H5AN8G6NAFR-RDC datasheet(34/45 Pages) HYNIX

34 / 45 page

Rev. 1.2 / Jul.2017

NOTE :

DRAM package electrical specifications (x4/x8)

Symbol

Parameter

DDR4-1600,1866,2133,2400,2666

Unit

NOTE

min

max

ZIO

Input/output Zpkg



1,2,4,5,10,11

TDIO

Input/output Pkg Delay

1,3,4,5,11

LIO

Input/output Lpkg

3.3

11,12

CIO

Input/output Cpkg

0.78

11,13

ZIO DQS

DQS_t, DQS_c Zpkg



1,2,5,10,11

TdIO DQS

DQS_t, DQS_c Pkg Delay

1,3,5,10,11

LIO DQS

DQS Lpkg

3.3

11,12

CIO DQS

DQS Cpkg

0.78

11,13

DZDIO DQS

Delta Zpkg DQS_t, DQS_c



1,2,5,7,10

DTdDIODQS

Delta Delay DQS_t, DQS_c

1,3,5,7,10

ZI CTRL

Input- CTRL pins Zpkg



1,2,5,9,10,11

TdI CTRL

Input- CTRL pins Pkg Delay

1,3,5,9,10,11

LI CTRL

Input CTRL Lpkg

3.4

11,12

CI CTRL

Input CTRL Cpkg

0.7

11,13

ZIADD CMD

Input- CMD ADD pins Zpkg



1,2,5,8,10,11

TdIADDCMD Input- CMD ADD pins Pkg Delay

1,3,5,8,10,11

LI ADD CMD

Input CMD ADD Lpkg

3.6

11,12

CI ADD CMD

Input CMD ADD Cpkg

0.74

11,13

ZCK

CLK_t & CLK_c Zpkg



1,2,5,10,11

TdCK

CLK_t & CLK_c Pkg Delay

1,3,5,10,11

LI CLK

Input CLK Lpkg

3.4

11,12

CI CLK

Input CLK Cpkg

0.7

11,13

DZDLK

Delta Zpkg CLK_t & CLK_c



1,2,5,6,10

DTdLK

Delta Delay CLK_t & CLK_c

1,3,5,6,10

ZO ZQ

ZQ Zpkg

100



1,2,5,10,11

TdO ZQ

ZQ Delay

1,3,5,10,11

ZO ALERT

ALERT Zpkg

100



1,2,5,10,11

TdO ALERT

ALERT Delay

1,3,5,10,11

H5AN8G6NAFR-RDC Datasheet(PDF) 34 Page - Hynix Semiconductor

H5AN8G6NAFR-RDC Datasheet(HTML) 34 Page - Hynix Semiconductor

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