H5AN8G6NAFR-RDC datasheet(38/45 Pages) HYNIX

Part #	H5AN8G6NAFR-RDC

Description	8Gb DDR4 SDRAM Lead-Free&Halogen-Free (RoHS Compliant)

PDF	45 Pages

Scroll/Zoom	100%

Manufacturer	HYNIX [Hynix Semiconductor]

Direct Link	http://www.skhynix.com/kor/main.do

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38 / 45 page

Rev. 1.2 / Jul.2017

Standard Speed Bins

DDR4-1600 Speed Bins and Operations

Speed Bin

DDR4-1600K

Unit

NOTE

CL-nRCD-nRP

11-11-11

Parameter

Symbol

min

max

Internal read command to first

data

tAA

13.7513

(13.50)5,11

18.00

Internal read command to first

data with read DBI enabled

tAA_DBI

tAA(min) + 2nCK

tAA(max) +2nCK

ACT to internal read or write

delay time

tRCD

13.75

(13.50)5,11

PRE command period

tRP

13.75

(13.50)5,11

ACT to PRE command period

tRAS

9 x tREFI

ACT to ACT or REF command

period

tRC

48.75

(48.50)5,11

Normal Read DBI

CWL = 9

CL = 9

CL = 11 tCK(AVG)

1.5

1.6

1,2,3,4,10

,13

CL = 10

CL = 12 tCK(AVG)

Reserved

ns 1,2,3,4,10

CWL = 9,11

CL = 10

CL = 12 tCK(AVG)

Reserved

1,2,3,4

CL = 11

CL = 13 tCK(AVG)

1.25

<1.5

1,2,3,4

CL = 12

CL = 14 tCK(AVG)

1.25

<1.5

1,2,3

Supported CL Settings

9,11,12

nCK

12,13

Supported CL Settings with read DBI

11,13,14

nCK

Supported CWL Settings

9,11

nCK

H5AN8G6NAFR-RDC Datasheet(PDF) 38 Page - Hynix Semiconductor

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