SH79F166APSLASH044PR datasheet(19/113 Pages) SINOWEALTH

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SH79F166A

7.1.2 Enhanced CPU core SFRs

 Extended 'MUL' and 'DIV' instructions: 16bit*8bit, 16bit/8bit

 Dual Data Pointer

 Enhanced CPU core registers: AUXC, DPL1, DPH1, INSCON

The SH79F166A has modified 'MUL' and 'DIV' instructions. These instructions support 16 bit operand. A new register - the

The AUXC register is used during 16 bit operand multiply and divide operations. For other instructions it can be treated as

another scratch pad register.

After reset, the CPU is in standard mode, which means that the 'MUL' and 'DIV' instructions are operating like the standard

8051 instructions. To enable the 16 bit mode operation, the corresponding enable bit in the INSCON register must be set.

Operation

Result

AUXC

MUL

INSCON.2 = 0; 8 bit mode

(A)*(B)

Low Byte

High Byte

---

INSCON.2 = 1; 16 bit mode

(AUXC A)*(B)

Low Byte

Middle Byte

High Byte

DIV

INSCON.3 = 0; 8 bit mode

(A)/(B)

Quotient Low Byte

Remainder

---

INSCON.3 = 1; 16 bit mode

(AUXC A)/(B)

Quotient Low Byte

Remainder

Quotient High Byte

Dual Data Pointer

Using two data pointers can accelerate data memory moves. The standard data pointer is called DPTR and the new data

pointer is called DPTR1.

DPTR1 is the same with DPTR, which consists of a high byte (DPH1) and a low byte (DPL1). Its intended function is to hold a

16-bit address, but it may be manipulated as a 16-bit register or as two independent 8-bit registers.

The DPS bit in INSTCON register is used to choose the active pointer. The user can switch data pointers by toggling the DPS

bit. And all DPTR-related instructions will use the currently selected data pointer.

7.1.3 Register

Table 7.2 Data Pointer Select Register

86H

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

INSCON

BKS0

DIV

MUL

DPS

R/W

Reset Value

(POR/WDT/LVR/PIN)

Bit Number

Bit Mnemonic

Description

BKS0

SFR Bank Selection Bit

0: SFR Bank0 selected

1: SFR Bank1 selected

DIV

16 bit/8 bit Divide Selection Bit

0: 8 bit Divide

1: 16 bit Divide

MUL

16 bit/8 bit Multiply Selection Bit

0: 8 bit Multiply

1: 16 bit Multiply

DPS

Data Pointer Selection Bit

0: Data pointer

1: Data pointer1

SH79F166AP/044PR Datasheet(PDF) 19 Page - SINOWEALTH Electronic Ltd

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