SH79F166APSLASH044PR datasheet(60/113 Pages) SINOWEALTH

60 / 113 page

SH79F166A

Enhanced Function

8.1 Normal Resistor LCD Driver

The LCD driver contains a controller, a duty cycle generator with 4/8 Common signal pins and 19 Segment driver pins. Segment

1-19 and COM1-COM4 can also be used as I/O port, it is controlled by the P0SS, P1SS & P3SS register.

The 28 bytes display data RAM is addressed to 1E0H-1F2H, which could be used as data memory if needed. LCD COM1-8 can

also be used as LED.

The MCU consists normal display topologies with contrast adjustment which supports both 1/4duty-1/3bias and 1/8duty-1/4

bias driving mode, DISPEDL (DISPCON.7) must be cleared before LCD working.When ELCC in DISPCON is set, the LCD

supply power VLCD is selected by VOL[3:0]. When ELCC is cleared, VLCD equals to VDD.

When MCU enters the Power-Down mode, the LCD will be turned off. If 32.768kHz crystal/128kHz works in Power-down mode,

the LCD is still working.but the data of LCD RAM keeps the value.During the Power on Reset or Pin Reset or LVR Reset or

Watch-dog Reset, the LCD will be turned off, and Common and Segment will output low.

The features of the LCD Normal Display Mode include the following:

- LCD clock is decided by code option OP_OSC

- When OP_OSC[3:0] is 1010, 1101, LCD clock source is 32.768kHz, DISPCLK register is invalid, LCD frame is 64Hz.

- When OP_OSC[3:0] is 0011, 0110, LCD clock source is 128kHz, DISPCLK register is invalid, LCD frame is 64Hz.

- When OP_OSC[3:0] is 0000, LCD clock source is internal RC (12MHz), LCD clock = internal RC (12MHz)/DISPCLK, LCD

frame = LCD clock/512.

- When OP_OSC[3:0] is 1110, LCD clock source is crystal or ceramic, LCD clock = crystal or ceramic frenquncy/DISPCLK.

- 1/4duty -1/3 bias or 1/5 duty - 1/3 bias by configuring the DUTY bit in LCDCON register.

- LCD frame = LCD clock/512.

- 16 levels contrast adjustment by configuring the CONTR[2:0] bits in LCDCON1 register.

- LCD bias resistor (RLCD) can be selected as 20K/75K/300K

Ω in 1/3 bias mode, 15K/56K/225K in 1/4 bias mode

The relatively high current drain through the 20k resistor will get better LCD display effect, but it may not be suitable for some

low current consume application. Lowering this current is possible by configucring the OP_RLCD[2:0] for switching the RLCD

value to 75/300K.

Therefore, SH79F166A provides both the low power consumption and display effect of the display mode:fast charge mode.

Set MOD[1:0] = 10 to select this mode. When refresh the display data 20k bias resistors are selected to provide larger

current.When keep the display data 75/300K bias resistors are selected to save drive current. Charging time is selected as

1/8、1/16、1/32 or 1/64 of LCD com period by FCCTL[1:0] in DISPCLK1 register.

SH79F166AP/044PR Datasheet(PDF) 60 Page - SINOWEALTH Electronic Ltd