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SH79F166AP/044PR Datasheet(PDF) 67 Page - SINOWEALTH Electronic Ltd |
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SH79F166AP/044PR Datasheet(HTML) 67 Page - SINOWEALTH Electronic Ltd |
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67 / 113 page  SH79F166A 67 8.2 LED Driver The LED driver contains a controller, a duty cycle generator with 4/8 Common signal pins and 8 Segment driver pins. Segment 1-8 can also be used as I/O port,When DISPSEL bit is set, LED function is enable,and LCD is disable. It is controlled by the P0SS, P1SS register. When MCU enters the Power-Down mode, the LED will be turned off, If 32.768kHz crystal or 128k internal RC works in Power-down mode,the LED is still working. When OP_LEDCOM = 0 Common and Segment will output low. When OP_LEDCOM = 1 Common and Segment will output high. 8.2.1 Register Table 8.8 LED Control Register ABH, Bank0 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 DISPCON DISPSEL LEDON - DUTY - - - - R/W R/W R/W - R/W - - - - Reset Value (POR/WDT/LVR/PIN) 0 0 - 0 - - - - Bit Number Bit Mnemonic Description 7 DISPSEL LCD/LED control bit 0: select LCD driver 1: select LCD drive 6 LEDON LED on/off control bit 0: Disable LED driver 1: Enable LED drive 4 DUTY LED duty selection bit 0: 1/4 duty 1: 1/8 duty Note: SH79F166A has LCD and LED driver,but can not work in the same time.When DISPSEL = 1, LCD is disable, DISPSEL = 0, LED is disable. Table 8.9 LED Clock Control Register ACH, Bank0 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 DISPCLK0 DCK0.7 DCK0.6 DCK0.5 DCK0.4 DCK0.3 DCK0.2 DCK0.1 DCK0.0 R/W R/W R/W R/W R/W R/W R/W R/W R/W Reset Value (POR/WDT/LVR/PIN) 0 0 0 0 0 0 0 0 AAH, Bank0 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 DISPCLK1 - - - - - - - DCK1.0 R/W - - - - - - - R/W Reset Value (POR/WDT/LVR/PIN) - - - - - - - 0 Bit Number Bit Mnemonic Description 0 7-0 DCK1.0 DCK0[7:0] LED clock select 0x000: LED clock = OSCCLK Others: LED clock/DISPCLK Note: Only when OP_OSC[2:0] is 000, 101 and 110, DISPCLK register is available. |
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