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SH79F166AP/044PR Datasheet(PDF) 44 Page - SINOWEALTH Electronic Ltd |
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SH79F166AP/044PR Datasheet(HTML) 44 Page - SINOWEALTH Electronic Ltd |
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44 / 113 page  SH79F166A 44 Table 7.27 Timer2 Mode Control Register C9H, Bank0 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 T2MOD - - - - - - T2OE DCEN R/W - - - - - - R/W R/W Reset Value (POR/WDT/LVR/PIN) - - - - - - 0 0 Bit Number Bit Mnemonic Description 1 T2OE Timer2 Output Enable bit 0: Set P0.5/T2 as clock input or I/O port 1: Set P0.5/T2 as clock output (Baud-Rate generator mode) 0 DCEN Down Counter Enable bit 0: Disable Timer2 as up/down counter, Timer2 is an up counter 1: Enable Timer2 as up/down counter Table 7.28 Timer2 Reload/Capture & Data Registers CAH-CDH, Bank0 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 RCAP2L RCAP2L.7 RCAP2L.6 RCAP2L.5 RCAP2L.4 RCAP2L.3 RCAP2L.2 RCAP2L.1 RCAP2L.0 RCAP2H RCAP2H.7 RCAP2H.6 RCAP2H.5 RCAP2H.4 RCAP2H.3 RCAP2H.2 RCAP2H.1 RCAP2H.0 TL2 TL2.7 TL2.6 TL2.5 TL2.4 TL2.3 TL2.2 TL2.1 TL2.0 TH2 TH2.7 TH2.6 TH2.5 TH2.4 TH2.3 TH2.2 TH2.1 TH2.0 R/W R/W R/W R/W R/W R/W R/W R/W R/W Reset Value (POR/WDT/LVR/PIN) 0 0 0 0 0 0 0 0 Bit Number Bit Mnemonic Description 7-0 RCAP2L.x Timer2 Reload/Capturer Data, x = 0 - 7 RCAP2H.x 7-0 TL2.x Timer2 Low & High byte counter, x = 0 - 7 TH2.x |
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