SH79F166APSLASH044PR datasheet(72/113 Pages) SINOWEALTH

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SH79F166A

8.3.4 12-bit PWM Timer

The SH79F166A has one 12-bit PWM module. The PWM module can provide the pulse width modulation waveform with the

period and the duty being controlled, individually. The PWMC is used to control the PWM module operation with proper clocks.

The PWMP is used to control the period cycle of the PWM module output. PWMD is used to control the duty in the waveform of

the PWM module output.

It is acceptable to change these 3 registers during PWM output Enable. All the change will take affect at the next PWM period.

Table 8.15 12-bit PWM Control Register

D2H

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

PWM0C

PWM0IE

PWM0IF

FLTS

FLTC

PWM0S

TnCK01

TnCK00

R/W

Reset Value

(POR/WDT/LVR/PIN)

Bit Number

Bit Mnemonic

Description

PWM0IE

PWM0 interrupt enable bit (When EPWM bit in IEN1 is set)

0: Disable PWM0 interrupt

1: Enable PWM0 interrupt

PWM0IF

PWM0 interrupt flag

0: Clear by software

1: Set by hardware to indicate that the PWM0 period counter overflow

FLTS

FLT status bit

0: PWM is in normal status, cleared by software

1: PWM is in inactive status, set automatically by hardware

FLTC

FLT pin configuration

0: Inactivate the PWM output when FLT is low level

1: Inactivate the PWM output when FLT is high level

PWM0S

PWM0 output normal mode of duty cycle

0: high active, PWM0 output high during duty time, output low during remain period

time

1: low active, PWM0 output low during duty time, output high during remain period

time

1-0

TnCK0[1:0]

12-bit PWM clock selector:

00: Oscillator clock/2

01: Oscillator/4

10: Oscillator/8

11: Oscillator/16

Note: When OP_OSC is 0000, 0011 or 1010,PWM clock source is internal RC,

When OP_OSC is 1110, PWM clock source is crystal or ceramic, When OP_OSC

is 0110 or 1101, PWM clock source is crystal or ceramic in XTALX pins.

Note:

(1)Inactivate PWM here means PWM0 and PWM01 outputs keep Low (if PWM0S = 0) or High (if PWM0S = 1).

(2) The PWM outputs will remain in the inactive states as soon as the high/low level of FLT pin is detected.

(3)Clearing FLTS bit when a FAULT input is coming will not success.

SH79F166AP/044PR Datasheet(PDF) 72 Page - SINOWEALTH Electronic Ltd

SH79F166AP/044PR Datasheet(HTML) 72 Page - SINOWEALTH Electronic Ltd

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