FS32R274VCK2MMM datasheet(16/78 Pages) NXP

16 / 78 page

4.4 Voltage regulator electrical characteristics

Table 9. Voltage regulator electrical specifications

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

POR-R

1.25 V VDD core POR release

—

0.97

1.02

1.06

POR-E

1.25 V VDD core POR engage

—

0.93

0.98

1.02

LVD12R

Low-Voltage Detection 1.25 V release (Core

VDD supply, and PLL0/1 supply LVDs)

Untrimmed

1.122

1.157

1.192

LVD12R-trim

Trimmed

1.142

1.157

1.172

LVD12E

Low-Voltage Detection 1.25 V engage (Core

VDD supply and PLL0/1 supply LVDs)

Untrimmed

1.102

1.137

1.172

LVD12E-trim

Trimmed

1.122

1.137

1.152

HVD12R-trim

High-Voltage Detection 1.25 V release

(Core VDD)

Trimmed

1.33

1.35

1.37

HVD12E-trim

High-Voltage Detection 1.25 V engage

(Core VDD supply)

Trimmed

1.36

1.38

1.40

LVD_MIPI12R-trim

Low-Voltage Detection 1.25V release

(MIPICSI2 DPHY supply)

—

1.130

1.157

1.184

LVD_MIPI12E-trim

Low-Voltage Detection 1.25V engage

(MIPICSI2 DPHY supply)

—

1.111

1.137

1.163

POR-R-

VDD_HV_PMU

3.3 V PMU supply voltage POR release

threshold

—

2.54

2.645

2.735

POR-E-

VDD_HV_PMU

3.3 V PMU supply voltage POR engage

threshold

—

2.50

2.60

2.695

LVD33R

3.3V Low-Voltage Detection Release

Threshold (PMC, FLASH, IO, ADC)

Untrimmed

2.90

3.02

3.13

LVD33R-trim

Trimmed

3.00

3.05

3.10

LVD33E

3.3V Low-Voltage Detection Engage

Threshold (PMC, FLASH, IO, ADC)

Untrimmed

2.86

2.98

3.09

LVD33E-trim

Trimmed

2.96

3.01

3.06

HVD33R

3.3V High-Voltage Detection Release

Threshold (ADC)

Untrimmed

3.45

3.61

3.75

HVD33R-trim

Trimmed

3.47

3.53

3.58

HVD33E

3.3V High-Voltage Detection Engage

Threshold (ADC)

Untrimmed

3.51

3.65

3.79

HVD33E-trim

Trimmed

3.51

3.57

3.62

UVL30R

SMPS under-voltage lockout release

threshold

Untrimmed

2.75

2.90

3.05

UVL25E

SMPS under-voltage lockout engage

threshold

2.40

2.55

2.7

DGLITCHE

Voltage Detector Deglitcher Filter Time -

Engage

—

2.0

3.5

µs

DGLITCHR

Voltage Detector Deglitcher Filter Time -

Release

—

µs

RSTDGLTC

VREG_POR_B Input Deglitch Filter Time

—

200

320

500

RSTPUP

VREG_POR_B Pin Pull-up Resistance

—

150

kΩ

REGENPUP

VREG_SEL Pin Pull-up Resistance

—

150

kΩ

VSMPS

Internal switched regulator output voltage 1 Load Current from 10

mA to 1.8 A

1.19

1.255

1.35

Table continues on the next page...

General

S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021

NXP Semiconductors

FS32R274VCK2MMM Datasheet(PDF) 16 Page - NXP Semiconductors

FS32R274VCK2MMM Datasheet(HTML) 16 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78

Datasheet Download

Link URL