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FS32R274VCK2MMM Datasheet(PDF) 59 Page - NXP Semiconductors

Part # FS32R274VCK2MMM
Description  S32R274/S32R264 Series Data Sheet
PDF  78 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS32R274VCK2MMM Datasheet(HTML) 59 Page - NXP Semiconductors

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Figure 31. I2C input/output timing
Debug modules
10.1 JTAG/CJTAG interface timing
The following table lists JTAGC/CJTAG electrical characteristics.
• Measurements are with input transition of 1 ns, output load of 50 pF and pads
configured with SRE=11.
Table 46. JTAG/CJTAG pin AC electrical characteristics 1
#
Symbol
Characteristic
Min
Max
Unit
1
tJCYC2
TCK Cycle Time (JTAG)
36
—
ns
TCK Cycle Time (CJTAG)
50
2
tJDC
TCK Clock Pulse Width
40
60
%
3
tTCKRISE
TCK Rise and Fall Times (40% - 70%)
—
3
ns
4
tTMSS, tTDIS TMS, TDI Data Setup Time
5
—
ns
5
tTMSH, tTDIH TMS, TDI Data Hold Time
5
—
ns
6
tTDOV
TCK Low to TDO/TMS Data Valid 3
—
154
ns
7
tTDOI
TCK Low to TDO/TMS Data Invalid3
0
—
ns
8
tTDOHZ
TCK Low to TDO/TMS High Impedance3
—
22
ns
9
tJCMPPW
JCOMP Assertion Time
100
—
ns
10
tJCMPS
JCOMP Setup Time to TCK Low
40
—
ns
11
tBSDV
TCK Falling Edge to Output Valid
—
6005
ns
12
tBSDVZ
TCK Falling Edge to Output Valid out of High
Impedance
—
600
ns
13
tBSDHZ
TCK Falling Edge to Output High Impedance
—
600
ns
14
tBSDST
Boundary Scan Input Valid to TCK Rising Edge
15
—
ns
Table continues on the next page...
10
Debug modules
S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021
NXP Semiconductors
59



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