FS32R274VCK2MMM datasheet(35/78 Pages) NXP

35 / 78 page

Table 26. Sigma Delta ADC Parameters (continued)

Symbol

Parameter

Condition

Min

Typ

Max

Unit

OEV

Offset Variation

t = 50 ms, T = constant, data averaged in 1

ms increments

-0.07

—

0.07

Vcm

Common Mode

Voltage2

SDADC switched on

—

vdda/2 –

30 mV

—

xtalk

Crosstalk (from any

ADC to the other

ADCs)

Processing a full scale signal.

—

-40

Zin

Input Impedance

Maximum input impedance occurs for input

signals at 20 KHz and minimum input

impedance occurs at input frequencies

greater than 1 MHz3

7.3

—

33.5

kΩ

Rcm

Resistance from

each SDADC input to

Vcm (see Figure 9)

27.3

32.2

37.0

kΩ

R_SDADC

Resistance from

each SDADC input

pin to differential

amplifier input (see

Figure 9)

9.0

10.75

12.5

kΩ

C_SDADC

SDADC integrator

capacitors (see

Figure 9)

0.636

0.684

0.732

Cin parasitic

parasitic input

capacitance from

ADC input to ground

2.0

3.9

4.9

Analog Delay

Variation

(ADCx to ADCy)

—

Alias Suppression

ADC input frequency between 315 and 325

MHz

—

STFoob

ADC out of band

Signal Transfer

Function peaking

Out of band Signal Transfer function peaking

from 20 MHz to 40 MHz

passband ripple

From 20 KHz to 4 MHz (default decimation

filter coefficients must be used)

-0.5

0.0

0.5

OOBA4

Out Of Band

Attenuation

Default decimation filter coefficients must be

used

5 MHz

6 MHz

7 MHz

10 MHz

15 MHz

-4.5

-10

-20

-40

-60

—

1. Derate specification by 2 dBFS for Tj less than 0°C.

2. vdda is an internally regulated and trimmed 1.45V ± 10mV voltage.

3. The input structure of the ADC is an active RC integrator which has a frequency dependent input impedance as indicated

in ADC input equivalent circuit.

4. All attenuation values are relative to 0 dB in the ADC passband.

Analog modules

S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021

NXP Semiconductors

FS32R274VCK2MMM Datasheet(PDF) 35 Page - NXP Semiconductors

FS32R274VCK2MMM Datasheet(HTML) 35 Page - NXP Semiconductors

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