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CLRC63201T/0FE Datasheet(PDF) 87 Page - NXP Semiconductors |
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CLRC63201T/0FE Datasheet(HTML) 87 Page - NXP Semiconductors |
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87 / 163 page ![]() Philips Semiconductors Product Specification Rev. 3.0; May 2003 Multiple Protocol Contactless Reader IC CL RC632 87 Confidential 9.2 Implementation of the Timer Unit 9.2.1 BLOCK DIAGRAM The following block diagram shows the timer module. The timer unit is designed in a way, that several events in combination with enabling flags start or stop the counter. For example, setting the bit TStartTxBegin to 1 enables to control the receiving of data using the timer unit. In addition, the first received bit is indicated by TxBeginEvent. This combination starts the counter at the defined TReloadValue. The timer stops either automatically if the counter value is equal to zero, or if a defined stop event happens. Counter Module (x <= x-1) start counter / parallel load stop counter >clock Clock Divider 13.56 MHz TPreScaler [4:0] TReloadValue [7:0] TStopNow RxEnd Event TAutoRestart TStopRxEnd RxBegin Event TStopRxBegin TStartNow TxEnd Event TStartTxEnd TxBegin Event TStartTxBegin TimerValue [7:0] parallel in parallel out Counter = 0 ? to Interrupt Logic: TimerIRq to Parallel Interface S R Q Q TRunning Figure 9-1: Timer Module Block Diagram |
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