CLRC63201TSLASH0FE datasheet(106/163 Pages) PHILIPS

106 / 163 page

Philips Semiconductors

Product Specification Rev. 3.0; May 2003

Multiple Protocol Contactless Reader IC

CL RC632

106

Confidential

14.3.3 CORRELATION CIRCUITRY

The correlation circuitry calculates the degree of matching between the received and an expected signal.

The output is a measure for the amplitude of the expected signal in the received signal. This is done for both,

the Q- and the

I-channel. The correlator delivers two outputs for each of the two input channels, resulting in

four output signals in total.

For optimum performance, the correlation circuitry needs the phase information for the signal coming from

the card. This information has to be defined by the µ-Processor by means of the register BitPhase [7:0]. This

value defines the phase relation between the transmitter and receiver clock in multiples of tBitPhase =

1/13.56 MHz.

14.3.4 EVALUATION AND DIGITIZER CIRCUITRY

For each bit-half of the Manchester coded signal the correlation results are evaluated. The evaluation and

digitizer circuit decides from the signal strengths of both bit-halves, whether the current bit is valid, and, if it is

valid, the value of the bit itself or whether the current bit-interval contains a collision.

To do this in an optimum way, the user may select the following levels:

•

MinLevel: Defines the minimum signal strength of the stronger bit-half’s signal for being considered valid.

•

CollLevel: Defines the minimum signal strength that has to be exceeded by the weaker half-bit of the

Manchester-coded signal to generate a bit-collision. If the signal’s strength is below this value, a 1 and 0

can be determined unequivocally.

CollLevel defines the minimum signal strength relative to the amplitude of the stronger half-bit.

After transmission of data, the card is not allowed to send its response before a certain time period, called

frame guard time in the standard ISO14443. The length of this time period after transmission shall be set in

the RxWait-Register. The RxWait-Register defines when the receiver is switched on after data transmission

to the card in multiples of one bit-duration.

If register bit RcvClkSel

I is set to 1, the I-clock is used to clock the correlator and evaluation circuits. If set to

0, the Q-clock is used.

Note: It is recommended to use the Q-clock.

CLRC63201T/0FE Datasheet(PDF) 106 Page - NXP Semiconductors