PIC18F6X2X datasheet(20/386 Pages) MICROCHIP

20 / 386 page

PIC18F6X2X/8X2X

DS39612A-page 18

Advance Information

 2003 Microchip Technology Inc.

PORTG is a bi-directional I/O port.

RG0/CCP3/P3A

RG0

CCP3

P3A

I/O

—

Digital I/O.

Capture3 input, Compare3 output,

PWM3 output.

Enhanced CCP3 output P3A.

RG1/TX2/CK2

RG1

TX2

CK2

I/O

—

Digital I/O.

USART 2 asynchronous transmit.

USART 2 synchronous clock

(see RX2/DT2).

RG2/RX2/DT2

RG2

RX2

DT2

I/O

Digital I/O.

USART 2 asynchronous receive.

USART 2 synchronous data

(see TX2/CK2).

RG3/CCP4/P3D

RG3

CCP4

P3D

I/O

—

Digital I/O.

Capture4 input, Compare4 output,

PWM4 output.

Enhanced CCP3 output P3D.

RG4/CCP5/P1D

RG4

CCP5

P1D

810

I/O

—

Digital I/O.

Capture5 input, Compare5 output,

PWM5 output.

Enhanced CCP1 output P1D.

RG5

—

See MCLR/VPP/RG5 pin.

TABLE 1-2:

PIC18F6X2X/8X2X PINOUT I/O DESCRIPTIONS (CONTINUED)

Pin Name

Pin Number

Type

Buffer

Type

Description

PIC18F6X2X

PIC18F8X2X

Legend:

TTL = TTL compatible input

CMOS = CMOS compatible input or output

= Schmitt Trigger input with CMOS levels

Analog = Analog input

= Input

= Output

= Power

= Open Drain (no P diode to VDD)

Note

Alternate assignment for CCP2/P2A in PIC18F8X2X devices when CCP2MX (CONFIG3H<0>) is not set (all Program

Memory modes except Microcontroller).

Default assignment for CCP2/P2A when CCP2MX is set (all devices).

External memory interface functions are only available on PIC18F8X2X devices.

Default assignment for P1B/P1C/P3B/P3C for PIC18F8X2X devices when ECCPMX (CONFIG3H<1>) is set, and for all

PIC18F6X2X devices.

Alternate assignment for CCP2/P2A in PIC18F8X2X devices when CCP2MX is not set (Microcontroller mode).

PORTH and PORTJ (and their multiplexed functions) are only available on PIC18F8X2X devices.

Alternate assignment for P1B/P1C/P3B/P3C for PIC18F8X2X devices when ECCPMX (CONFIG3H<1>) is not set.

AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for proper operation of

the part in User or ICSP modes. See parameter D001A for details.

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