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PIC16F18323-E/RFQTP Datasheet(PDF) 105 Page - Microchip Technology |
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PIC16F18323-E/RFQTP Datasheet(HTML) 105 Page - Microchip Technology |
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105 / 442 page ![]() 2015 Microchip Technology Inc. Preliminary DS40001799A-page 105 PIC16(L)F18313/18323 9.0 WATCHDOG TIMER (WDT) The Watchdog Timer is a system timer that generates a Reset if the firmware does not issue a CLRWDT instruction within the time-out period. The Watchdog Timer is typically used to recover the system from unexpected events. The WDT has the following features: • Independent clock source • Multiple operating modes - WDT is always on - WDT is off when in Sleep - WDT is controlled by software - WDT is always off • Configurable time-out period is from 1 ms to 256 seconds (nominal) • Multiple Reset conditions • Operation during Sleep FIGURE 9-1: WATCHDOG TIMER BLOCK DIAGRAM 9.1 Independent Clock Source The WDT derives its time base from the 31 kHz LFINTOSC internal oscillator. Time intervals in this chapter are based on a nominal interval of 1 ms. See Table 34-8 for the LFINTOSC specification. 9.2 WDT Operating Modes The Watchdog Timer module has four operating modes controlled by the WDTE<1:0> bits in Configuration Words. See Table 9-1. 9.2.1 WDT IS ALWAYS ON When the WDTE bits of Configuration Words are set to ‘11’, the WDT is always on. WDT protection is active during Sleep. 9.2.2 WDT IS OFF IN SLEEP When the WDTE bits of Configuration Words are set to ‘10’, the WDT is on, except in Sleep. WDT protection is not active during Sleep. 9.2.3 WDT CONTROLLED BY SOFTWARE When the WDTE bits of Configuration Words are set to ‘01’, the WDT is controlled by the SWDTEN bit of the WDTCON register. WDT protection is unchanged by Sleep. See Table 9-1 for more details. TABLE 9-1: WDT OPERATING MODES LFINTOSC 23-bit Programmable Prescaler WDT WDT Time-out WDTPS<4:0> SWDTEN Sleep WDTE<1:0> = 11 WDTE<1:0> = 01 WDTE<1:0> = 10 WDTE<1:0> SWDTEN Device Mode WDT Mode 11 X XActive 10 X Awake Active Sleep Disabled 01 1 X Active 0 Disabled 00 X XDisabled |
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