PIC16F18323-ESLASHRFQTP datasheet(115/442 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

Preliminary

DS40001799A-page 115

PIC16(L)F18313/18323

10.4.5

NVMREG WRITE TO PROGRAM

FLASH MEMORY

Program memory is programmed using the following

steps:

Load the address of the row to be programmed

into NVMADRH:NVMADRL.

Load each write latch with data.

Initiate a programming operation.

Repeat steps 1 through 3 until all data is written.

Before writing to program memory, the word(s) to be

written must be erased or previously unwritten.

Program memory can only be erased one row at a time.

No automatic erase occurs upon the initiation of the

write.

Program memory can be written one or more words at

a time. The maximum number of words written at one

time is equal to the number of write latches. See

Figure 10-4 (row writes to program memory with 32

write latches) for more details.

The write latches are aligned to the Flash row address

boundary

defined

the

upper

10-bits

NVMADRH:NVMADRL,(NVMADRH<6:0>:NVMADRL<

7:5>) with the lower five bits of NVMADRL,

(NVMADRL<4:0>) determining the write latch being

loaded. Write operations do not cross these boundaries.

At the completion of a program memory write operation,

the data in the write latches is reset to contain 0x3FFF.

The following steps should be completed to load the

write latches and program a row of program memory.

These steps are divided into two parts. First, each write

latch

loaded

with

data

from

the

NVMDATH:NVMDATL using the unlock sequence with

LWLO = 1. When the last word to be loaded into the

write latch is ready, the LWLO bit is cleared and the

unlock

sequence

executed.

This

initiates

the

programming operation, writing all the latches into

Flash program memory.

Set the WREN bit of the NVMCON1 register.

Clear the NVMREGS bit of the NVMCON1

Set the LWLO bit of the NVMCON1 register.

When the LWLO bit of the NVMCON1 register is

‘1’, the write sequence will only load the write

latches and will not initiate the write to Flash

program memory.

Load the NVMADRH:NVMADRL register pair

with the address of the location to be written.

Load the NVMDATH:NVMDATL register pair

with the program memory data to be written.

Execute the unlock sequence (Section 10.4.2

“NVM Unlock Sequence”

). The write latch is

now loaded.

Increment the NVMADRH:NVMADRL register

pair to point to the next location.

Repeat steps 5 through 7 until all but the last

write latch has been loaded.

Clear the LWLO bit of the NVMCON1 register.

When the LWLO bit of the NVMCON1 register is

‘0’, the write sequence will initiate the write to

Flash program memory.

10. Load the NVMDATH:NVMDATL register pair

with the program memory data to be written.

11. Execute the unlock sequence (Section 10.4.2

“NVM Unlock Sequence”

). The entire program

memory latch content is now written to Flash

program memory.

An example of the complete write sequence is shown in

Example 10-4. The initial address is loaded into the

NVMADRH:NVMADRL register pair; the data is loaded

using indirect addressing.

Note:

The special unlock sequence is required

to load a write latch with data or initiate a

Flash programming operation. If the

unlock sequence is interrupted, writing to

the latches or program memory will not be

initiated.

Note:

The program memory write latches are

reset to the blank state (0x3FFF) at the

completion of every write or erase

operation. As a result, it is not necessary

to load all the program memory write

latches. Unloaded latches will remain in

the blank state.

PIC16F18323-E/RFQTP Datasheet(PDF) 115 Page - Microchip Technology

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