DRV8876PWPR datasheet(23/51 Pages) TI2

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DRV8876

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SLVSDS7B – AUGUST 2019 – REVISED NOVEMBER 2019

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pattern with 1.2mm spacing).

•

4-layer PCB, standard FR4. Outer planes are 1-oz (35 mm copper thickness) or 2-oz copper thickness.

•

Top layer: DRV887x VQFN package footprint. Inner planes were kept at 1-oz.

•

Mid layer 1: GND plane thermally connected to DRV887x thermal pad through vias. The area of the

ground plane is 74.2 mm x 74.2 mm.

•

Mid layer 2: power plane, no thermal connection.

•

Bottom layer: signal layer with small copper pad underneath DRV887x and thermally connected through

via stitching from the TOP and internal GND planes. Bottom layer thermal pad is the same size as the

package (3 mm x 3 mm). Bottom pad size remains constant. Thermal vias are only present under the

thermal pad (grid pattern with 1.2mm spacing).

Figure 20 shows an example of the simulated board. Table 10 shows the dimensions of the board that were

varied for each simulation.

Figure 20. VQFN PCB model top layer

Table 10. Dimension A for 16-pin VQFN package

Cu area (mm2)

Dimension A (mm)

14.14

20.00

28.28

40.00

DRV8876PWPR Datasheet(PDF) 23 Page - Texas Instruments