| Electronic Components Datasheet Search |
|
DRV8876PWPR Datasheet(PDF) 3 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
DRV8876PWPR Datasheet(HTML) 3 Page - Texas Instruments |
|
3 / 51 page ![]() nSLEEP 1 CPL 12 Thermal Pad IPROPI 4 VM 9 nFAULT 2 VREF 3 CPH 11 VCP 10 EN/IN1 1 PMODE 16 Thermal Pad PH/IN2 2 nSLEEP 3 nFAULT 4 VREF 5 IPROPI 6 OUT1 8 GND 15 CPL 14 CPH 13 VCP 12 VM 11 OUT2 10 PGND 9 IMODE 7 3 DRV8876 www.ti.com SLVSDS7B – AUGUST 2019 – REVISED NOVEMBER 2019 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated 5 Pin Configuration and Functions DRV8876 RGT Package 16-Pin VQFN With Exposed Thermal Pad Top View DRV8876 PWP Package 16-Pin HTSSOP With Exposed Thermal Pad Top View (1) PWR = power, I = input, O = output, NC = no connection, OD = open-drain Pin Functions PIN TYPE(1) DESCRIPTION NAME RGT PWP CPH 11 13 PWR Charge pump switching node. Connect a X5R or X7R, 22-nF, VM-rated ceramic capacitor between the CPH and CPL pins. CPL 12 14 PWR EN/IN1 15 1 I H-bridge control input. See Control Modes. Internal pulldown resistor. GND 13 15 PWR Device ground. Connect to system ground. IMODE 5 7 I Current regulation and overcurrent protection mode. See Current Regulation. Quad- level input. IPROPI 4 6 O Analog current output proportional to load current. See Current Sensing. nFAULT 2 4 OD Fault indicator output. Pulled low during a fault condition. Connect an external pullup resistor for open-drain operation. See Protection Circuits. nSLEEP 1 3 I Sleep mode input. Logic high to enable device. Logic low to enter low-power sleep mode. See Device Functional Modes. Internal pulldown resistor. OUT1 6 8 O H-bridge output. Connect to the motor or other load. OUT2 8 10 O H-bridge output. Connect to the motor or other load. PGND 7 9 PWR Device power ground. Connect to system ground. PH/IN2 16 2 I H-bridge control input. See Control Modes. Internal pulldown resistor. PMODE 14 16 I H-bridge control input mode. See Control Modes. Tri-level input. VCP 10 12 PWR Charge pump output. Connect a X5R or X7R, 100-nF, 16-V ceramic capacitor between the VCP and VM pins. VM 9 11 PWR 4.5-V to 37-V power supply input. Connect a 0.1-µF bypass capacitor to ground, as well as sufficient Bulk Capacitance rated for VM. VREF 3 5 I External reference voltage input to set internal current regulation limit. See Current Regulation. PAD — — — Thermal pad. Connect to system ground. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |