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TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
ADDRESS & REGISTER MAP
Preliminary
2-6
Table 2.8 USB Register Map (Base = 0x80000500)
Name
Address
Type
Reset
Description
NON INDEXED REGISTERS
UBFADR
0x00
R/W
0x00
Function Address Register
UBPWR
0x04
R/W
0x00
Power Management Register
UBEIR
0x08
R/W
0x00
Endpoint Interrupt Flag Register
UBIR
0x18
R/W
0x00
USB Interrupt Flag Register
UBEIEN
0x1C
R/W
0x07
Endpoint Interrupt Enable Register
UBIEN
0x2C
R/W
0x04
Interrupt Enable Register
UBFRM1
0x30
R
0x00
Frame Number 1 Register
UBFRM2
0x34
R
0x00
Frame Number 2 Register
UBIDX
0x38
W
0x00
Index Register
COMMON INDEXED REGISTER
MAXP
0x40
R/W
0x01
IN Max Packet Register
IN INDEXED REGISTERS
INCSR1
0x44
R/W
0x00
IN CSR1 Register (EP0 CSR Register)
INCSR2
0x48
R/W
0x20
IN CSR2 Register
OUT INDEXED REGISTERS
OCSR1
0x50
R
0x00
OUT CSR1 Register
OCSR2
0x54
R/W
0x00
OUT CSR2 Register
OFIFO1
0x58
R
0x00
OUT FIFO Write Count 1 Register
OFIFO2
0x5C
R
0x00
OUT FIFO Write Count 2 Register
FIFO REGISTERS
EP0FIFO
0x80
R/W
Unknown
EP0 FIFO Register
EP1FIFO
0x84
R/W
Unknown
EP1 FIFO Register
EP2FIFO
0x88
R/W
Unknown
EP2 FIFO Register
DMA REGISTERS
DMACON
0xC0
R/W
0x00
DMA Control Register
DMAEP1
0xC4
R/W
Unknown
EP1 FIFO Access Register for DMA
DMAEP2
0xC8
R/W
Unknown
EP2 FIFO Access Register for DMA
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