SPMCK16Z4MPV20 datasheet(433/500 Pages) FREESCALE

433 / 500 page

M68HC16 Z SERIES

USER’S MANUAL

D-59

D.7.8 MCCI Port Data Registers

Two registers are associated with port MCCI, the MCCI general-purpose I/O port. Pins

used for general-purpose I/O must be configured for that function. When using port

MCCI as an output port, after configuring the pins as I/O, write the first byte to be out-

put before writing to the MDDR. Afterwards, write to the MDDR to assign each I/O pin

as either input or output. This outputs the value contained in register PORTMC for all

pins defined as outputs. To output different data, write another byte to PORTMC.

Writes to PORTMC are stored in the internal data latch. If any bit of PORTMC is con-

figured as discrete output, the value latched for that bit is driven onto the pin. Reads

of PORTMC return the value of the pin only if the pin is configured as a discrete input.

Otherwise, the value read is the value of the latch.

Reads of PORTMCP always return the state of the pins regardless of whether the pins

are configured for input or output. Writes to PORTMCP have no effect.

D.7.9 SCI Control Register 0

SCCR0 contains the SCI baud rate selection field. Baud rate must be set before the

SCI is enabled. The CPU16 can read and write SCCR0 at any time. Changing the val-

ue of SCCR0 bits during a transfer operation can disrupt the transfer.

Bits [15:13] — Not Implemented

SCBR[12:0] — SCI Baud Rate

SCI baud rate is programmed by writing a 13-bit value to this field. Writing a value of

zero to SCBR disables the baud rate generator. Baud clock rate is calculated as fol-

lows:

PORTMC — MCCI Port Data Register

$YFFC0C

PORTMCP — MCCI Port Pin State Register

$YFFC0E

NOT USED

PMC7

PMC6

PMC5

PMC4

PMC3

PMC2

PMC1

PMC0

RESET:

SCCR0A — SCIA Control Register 0

$YFFC18

SCCR0B — SCIB Control Register 0

$YFFC28

NOT USED

SCBR[12:0]

RESET:

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