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SPMCK16Z4MPV20 Datasheet(PDF) 134 Page - Freescale Semiconductor, Inc |
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SPMCK16Z4MPV20 Datasheet(HTML) 134 Page - Freescale Semiconductor, Inc |
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134 / 500 page ![]() SYSTEM INTEGRATION MODULE M68HC16 Z SERIES 5-28 USER’S MANUAL The periodic interrupt timer modulus counter is clocked by one of two signals. When the PLL is enabled (MODCLK = 1 during reset), fref is used with a slow reference os- cillator; fref 128 is used with fast reference oscillator. When the PLL is disabled (MOD- CLK = 0 during reset), fref is used. The value of the periodic timer prescaler (PTP) bit in the periodic interrupt timer register (PITR) determines system clock prescaling for the periodic interrupt timer. One of two options, either no prescaling, or prescaling by a factor of 512, can be selected. The value of PTP is affected by the state of the MOD- CLK pin during reset, as shown in Table 5-11. System software can change PTP val- ue. Either clock signal selected by the PTP is divided by four before driving the modulus counter. The modulus counter is initialized by writing a value to the periodic interrupt timer modulus (PITM[7:0]) field in PITR. A zero value turns off the periodic timer. When the modulus counter value reaches zero, an interrupt is generated. The modulus counter is then reloaded with the value in PITM[7:0] and counting repeats. If a new val- ue is written to PITR, it is loaded into the modulus counter when the current count is completed. The following equation calculates the PIT period when a slow reference frequency is used: The following equation calculates the PIT period when a fast reference frequency is used: The following equation calculates the PIT period for an externally input clock frequen- cy on both slow and fast reference frequency devices. 5.4.7 Interrupt Priority and Vectoring Interrupt priority and vectoring are determined by the values of the periodic interrupt request level (PIRQL[2:0]) and periodic interrupt vector (PIV) fields in the periodic in- terrupt control register (PICR). Table 5-11 MODCLK Pin and PTP Bit at Reset MODCLK PTP 0 (External Clock) 1 ( ÷ 512) 1 (Internal Clock) 0 ( ÷ 1) PIT Period PITM[7:0] () 1 if PTP = 0, 512 if PTP = 1 () 4 () f ref --------------------------------------------------------------------------------------------------------------------- = PIT Period 128 () PITM[7:0] () 1 if PTP = 0, 512 if PTP = 1 () 4 () f ref ------------------------------------------------------------------------------------------------------------------------------------ = PIT Period PITM[7:0] () 1 if PTP = 0, 512 if PTP = 1 () 4 () f sys --------------------------------------------------------------------------------------------------------------------- = Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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