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SPMCK16Z4MPV20 Datasheet(PDF) 144 Page - Freescale Semiconductor, Inc |
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SPMCK16Z4MPV20 Datasheet(HTML) 144 Page - Freescale Semiconductor, Inc |
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144 / 500 page ![]() SYSTEM INTEGRATION MODULE M68HC16 Z SERIES 5-38 USER’S MANUAL Figure 5-12 Word Read Cycle Flowchart 5.6.2.2 Write Cycle During a write cycle, the MCU transfers data to an external memory or peripheral de- vice. If the instruction specifies a long-word or word operation, the MCU attempts to write two bytes at once. For a byte operation, the MCU writes one byte. The portion of the data bus upon which each byte is written depends on operand size, peripheral ad- dress, and peripheral port size. Refer to 5.5.2 Dynamic Bus Sizing and 5.5.4 Misaligned Operands for more infor- mation. Figure 5-13 is a flowchart of a write-cycle operation for a word transfer. Refer to the SIM Reference Manual (SIMRM/AD) for more information. RD CYC FLOW MCU PERIPHERAL ADDRESS DEVICE (S0) 1) SET R/W TO READ 2) DRIVE ADDRESS ON ADDR[23:0] 3) DRIVE FUNCTION CODE ON FC[2:0] 4) DRIVE SIZ[1:0] FOR OPERAND SIZE START NEXT CYCLE (S0) 1) DECODE ADDR, R/W, SIZ[1:0], DS 2) PLACE DATA ON DATA[15:0] OR DATA[15:8] IF 8-BIT DATA PRESENT DATA (S2) 3) DRIVE DSACK SIGNALS TERMINATE CYCLE (S5) 1) REMOVE DATA FROM DATA BUS 2) NEGATE DSACK ASSERT AS AND DS (S1) DECODE DSACK (S3) LATCH DATA (S4) NEGATE AS AND DS (S5) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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