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PIC18LF4331 Datasheet(PDF) 111 Page - Microchip Technology |
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PIC18LF4331 Datasheet(HTML) 111 Page - Microchip Technology |
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111 / 392 page ![]() 2010 Microchip Technology Inc. DS39616D-page 111 PIC18F2331/2431/4331/4431 10.5 RCON Register The RCON register contains bits used to determine the cause of the last Reset or wake-up from a power- managed mode. RCON also contains the bit that enables interrupt priorities (IPEN). REGISTER 10-13: RCON: RESET CONTROL REGISTER R/W-0 U-0 U-0 R/W-1 R-1 R-1 R/W-0 R/W-0 IPEN — —RI TO PD POR BOR bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7 IPEN: Interrupt Priority Enable bit 1 = Enable priority levels on interrupts 0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode) bit 6-5 Unimplemented: Read as ‘0’ bit 4 RI: RESET Instruction Flag bit For details of bit operation, see Register 5-1. bit 3 TO: Watchdog Timer Time-out Flag bit For details of bit operation, see Register 5-1. bit 2 PD: Power-Down Detection Flag bit For details of bit operation, see Register 5-1. bit 1 POR: Power-on Reset Status bit For details of bit operation, see Register 5-1. bit 0 BOR: Brown-out Reset Status bit For details of bit operation, see Register 5-1. |
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