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IMX53CEC Datasheet(PDF) 59 Page - Freescale Semiconductor, Inc |
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IMX53CEC Datasheet(HTML) 59 Page - Freescale Semiconductor, Inc |
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59 / 204 page  Electrical Characteristics i.MX53xD Applications Processors for Consumer Products, Rev. 2 Freescale Semiconductor 59 Figure 21. 16-Bit Muxed A/D Mode, Synchronous Read Access, WSC=7, RADVN=1, ADH=1, and OEA=0 4.6.6.5 General EIM Timing-Asynchronous Mode Figure 22 through Figure 27, and Table 40 help to determine timing parameters relative to the chip select (CS) state for asynchronous and DTACK EIM accesses with corresponding EIM bit fields and the timing parameters mentioned above. Asynchronous read and write access length in cycles may vary from what is shown in Figure 22 through Figure 25 as RWSC, OEN, and CSN is configured differently. Refer to i.MX53xD RM for the EIM programming model. Last BCLK ADDR/ WE_B ADV_B OE_B BEy_B CSx_B Address V1 Data Valid Addr M_DATA WE5 WE6 WE7 WE14 WE15 WE10 WE11 WE12 WE13 WE18 WE19 WE4 |
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