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HT45FM2C Datasheet(PDF) 55 Page - Holtek Semiconductor Inc |
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HT45FM2C Datasheet(HTML) 55 Page - Holtek Semiconductor Inc |
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55 / 171 page  Rev. 1.10 54 �a� �0� �01� Rev. 1.10 55 �a� �0� �01� HT45FM2C Brushless DC Motor Flash Type 8-Bit MCU HT45FM2C Brushless DC Motor Flash Type 8-Bit MCU Preliminar� Input/Output Ports HoltekmicrocontrollersofferconsiderableflexibilityontheirI/Oports.Withtheinputoroutput designationofeverypinfullyunderuserprogramcontrol,pull-highselectionsforallportsand wake-upselectionsoncertainpins,theuserisprovidedwithanI/Ostructuretomeettheneedsofa widerangeofapplicationpossibilities. Thisdeviceprovidebidirectionalinput/outputlineslabeledwithportnamesPA~PDTheseI/Oports aremappedtotheRAMDataMemorywithspecificaddressesasshownintheSpecialPurpose DataMemorytable.AlloftheseI/Oportscanbeusedforinputandoutputoperations.Forinput operation,theseportsarenon-latching,whichmeanstheinputsmustbereadyattheT2risingedge ofinstruction“MOVA,[m]”,wheremdenotestheportaddress.Foroutputoperation,allthedatais latchedandremainsunchangeduntiltheoutputlatchisrewritten. I/O Register List Register Name Bit 7 6 5 4 3 2 1 0 PAWU D7 D6 D5 D4 D� D� D1 D0 PAPU D7 D6 D5 D4 D� D� D1 D0 PA D7 D6 D5 D4 D� D� D1 D0 PAC D7 D6 D5 D4 D� D� D1 D0 PBPU D7 D6 D5 D4 D� D� D1 D0 PB D7 D6 D5 D4 D� D� D1 D0 PBC D7 D6 D5 D4 D� D� D1 D0 PCPU D7 D6 D5 D4 D� D� D1 D0 PC D7 D6 D5 D4 D� D� D1 D0 PCC D7 D6 D5 D4 D� D� D1 D0 PDPU — — — — D� D� D1 D0 PD — — — — D� D� D1 D0 PDC — — — — D� D� D1 D0 Pull-high Resistors Manyproductapplicationsrequirepull-highresistorsfortheirswitchinputsusuallyrequiringthe useofanexternalresistor.Toeliminatetheneedfortheseexternalresistors,allI/Opins,when configuredasaninputhavethecapabilityofbeingconnectedtoaninternalpull-highresistor.These pull-highresistorsareselectedusingregisters,namelyPAPU~PDPU,andareimplementedusing weakPMOStransistors. PAPU Register Bit 7 6 5 4 3 2 1 0 Name D7 D6 D5 D4 D� D� D1 D0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 PBPU Register Bit 7 6 5 4 3 2 1 0 Name D7 D6 D5 D4 D� D� D1 D0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 |
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