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HT45FM2C Datasheet(PDF) 74 Page - Holtek Semiconductor Inc |
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HT45FM2C Datasheet(HTML) 74 Page - Holtek Semiconductor Inc |
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74 / 171 page  Rev. 1.10 74 �a� �0� �01� Rev. 1.10 75 �a� �0� �01� HT45FM2C Brushless DC Motor Flash Type 8-Bit MCU HT45FM2C Brushless DC Motor Flash Type 8-Bit MCU Preliminar� Timer/Counter Mode Toselectthismode,bitsTnM1andTnM0intheTMnC1registershouldbesetto11respectively. TheTimer/CounterModeoperatesinanidenticalwaytotheCompareMatchOutputMode generatingthesameinterruptflags.TheexceptionisthatintheTimer/CounterModetheTMoutput pinisnotused.ThereforetheabovedescriptionandTimingDiagramsfortheCompareMatch OutputModecanbeusedtounderstanditsfunction.AstheTMoutputpinisnotusedinthismode, thepincanbeusedasanormalI/Opinorotherpin-sharedfunction. PWM Output Mode Toselectthismode,bitsTnM1andTnM0intheTMnC1registershouldbesetto10respectively. ThePWMfunctionwithintheTMisusefulforapplicationswhichrequirefunctionssuchasmotor control,heatingcontrol,illuminationcontroletc.Byprovidingasignaloffixedfrequencybut ofvaryingdutycycleontheTMoutputpin,asquarewaveACwaveformcanbegeneratedwith varyingequivalentDCRMSvalues. AsboththeperiodanddutycycleofthePWMwaveformcanbecontrolled,thechoiceofgenerated waveformisextremelyflexible.InthePWMmode,theTnCCLRbithasnoeffectonthePWM operation.BothoftheCCRAandCCRPregistersareusedtogeneratethePWMwaveform,one registerisusedtocleartheinternalcounterandthuscontrolthePWMwaveformfrequency,while theotheroneisusedtocontrolthedutycycle.Whichregisterisusedtocontroleitherfrequency ordutycycleisdeterminedusingtheTnDPXbitintheTMnC1register.ThePWMwaveform frequencyanddutycyclecanthereforebecontrolledbythevaluesintheCCRAandCCRPregisters. Aninterruptflag,oneforeachoftheCCRAandCCRP,willbegeneratedwhenacomparematch occursfromeitherComparatorAorComparatorP.TheTnOCbitintheTMnC1registerisusedto selecttherequiredpolarityofthePWMwaveformwhilethetwoTnIO1andTnIO0bitsareusedto enablethePWMoutputortoforcetheTMoutputpintoafixedhighorlowlevel.TheTnPOLbitis usedtoreversethepolarityofthePWMoutputwaveform. 10-bit CTM, PWM Mode, Edge-aligned Mode, TnDPX=0 CCRP 001b 010b 011b 100b 101b 110b 111b 000b Period 1�8 �56 �84 51� 640 768 896 10�4 Dut� CCRA If fSYS=16MHz,TMclocksourceisfSYS/4,CCRP=100bandCCRA=128, TheCTMPWMoutputfrequency=(fSYS/4)/512=fSYS/2048=7.8125kHz,duty=128/512=25%. IftheDutyvaluedefinedbytheCCRAregisterisequaltoorgreaterthanthePeriodvalue,thenthe PWMoutputdutyis100%. 10-bit CTM, PWM Mode, Edge-aligned Mode, TnDPX=1 CCRP 001b 010b 011b 100b 101b 110b 111b 000b Period CCRA Dut� 1�8 �56 �84 51� 640 768 896 10�4 ThePWMoutputperiodisdeterminedbytheCCRAregistervaluetogetherwiththeTMclock whilethePWMdutycycleisdefinedbytheCCRPregistervalue. |
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