WM8983GEFLSLASHV datasheet(47/124 Pages) WOLFSON

47 / 124 page

Production Data

WM8983

PD, Rev 4.3, May 2010

LIMITER MODE

In limiter mode, the ALC will reduce peaks that go above the threshold level, but will not increase the

PGA gain beyond the starting level. The starting level is the PGA gain setting when the ALC is

enabled in limiter mode. If the ALC is started in limiter mode, this is the gain setting of the PGA at

startup. If the ALC is switched into limiter mode after running in ALC mode, the starting gain will be

the gain at switchover. The diagram below shows an example of limiter mode.

Figure 24 ALC Limiter Mode Operation

ALC LIMITER MODE INITIALISATION SEQUENCE

In order to correctly initialise the ALC in limiter mode, the following sequence of register writes is

required. MCLK must be applied during the initialisation sequence

1. R–5 - Set left input PGA gain (INPPGAVOLL) to level required for operation.

2. R–6 - Set right input PGA gain (INPPGAVOLR) to level required for operation.

3. R–4 - Enable analogue inputs as required.

4. –2 - Disable input PGA (INPPGAEN = 0).

5. R59 = 0x00–3 - Enable ALC test mode.

6. R–2 - Set ALCMAXGAIN and ALCMINGAIN to the level required for operation.

7. R–3 - Set limiter level (ALCLVL) to the level required for operation.

8. R34 = 0x00–0 - Enable ALC mode (ALCMODE = 0).

9. Insert 1ms delay to allow input PGA gain update by the limiter circuit.

WM8983GEFL/V Datasheet(PDF) 47 Page - Wolfson Microelectronics plc