WM8983GEFLSLASHV datasheet(98/124 Pages) WOLFSON

98 / 124 page

WM8983

Production Data

PD, Rev 4.3, May 2010

Notes:

1. Default values of N/A indicate non-latched data bits (e.g. software reset or volume update bits).

2. Register bits marked “s "Reser”ed" should not be changed from the default.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

0 (00h)

[8:0]

RESET

N/A

Software reset

Resetting the

Chip

1 (01h)

BUFDCOPEN

Dedicated buffer for DC level shifting output

stages when in 1.5x gain boost configuration.

0 = Buffer disabled

1 = Buffer enabled (required for 1.5x gain boost)

Analogue

Outputs

OUT4MIXEN

OUT4 mixer enable

0=disabled

1=enabled

Power

Management

OUT3MIXEN

OUT3 mixer enable

0=disabled

1=enabled

Power

Management

PLLEN

PLL enable

0=PLL off

1=PLL on

Master Clock

and Phase

Locked Loop

(PLL)

MICBEN

Microphone Bias Enable

0 = OFF (high impedance output)

1 = ON

Input Signal

Path

BIASEN

Analogue amplifier bias control

0=disabled

1=enabled

Power

Management

BUFIOEN

Unused input/output tie off buffer enable

0=disabled

1=enabled

Power

Management

1:0

VMIDSEL

Reference string impedance to VMID pin

(Determines startup time):

00 = off (250kΩ VMID to AGND1)

01 = 100kΩ

10 = 500kΩ

11 = 10kΩ total (for fast start-up)

Power

Management

2 (02h)

ROUT1EN

ROUT1 output enable

0=disabled

1=enabled

Power

Management

LOUT1EN

LOUT1 output enable

0=disabled

1=enabled

Power

Management

SLEEP

0 = normal device operation

1 = residual current reduced in device standby

mode

Power

Management

BOOSTENR

Right channel Input BOOST enable

0 = Boost stage OFF

1 = Boost stage ON

Power

Management

BOOSTENL

Left channel Input BOOST enable

0 = Boost stage OFF

1 = Boost stage ON

Power

Management

WM8983GEFL/V Datasheet(PDF) 98 Page - Wolfson Microelectronics plc

WM8983GEFL/V Datasheet(HTML) 98 Page - Wolfson Microelectronics plc

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