AT24C01D and AT24C02D [DATASHEET]

Atmel-8871B-SEEPROM-AT24C01D-02D-Datasheet_032014

12

Figure 6-2.

Random Read

6.3

Sequential Read

Sequential Reads are initiated by either a Current Address Read or a Random Read. After the bus Master receives

a data word, it responds with an acknowledge. As long as the EEPROM receives an ACK, it will continue to

increment the word address and serially clock out sequential data words. Figure 6-3 depicts a Sequential Read

sequence that was initiated as a Current Address Read. When the maximum memory address is reached, the data

word address will “roll over” and the sequential read will continue from the beginning of the memory array. All types

of Read operations will be terminated if the bus Master does not respond with an ACK (it NACKs) during the ninth

clock cycle. A Read instruction may be terminated at any point with a Stop condition which will force the device into

standby mode.

Figure 6-3.

Sequential Read, Initiated by a Current Address Read

7.

Device Default Condition from Atmel

The AT24C01D/02D is delivered with the EEPROM array set to Logic 1, resulting in FFh data in all locations.

SCL

SDA

Start

by

Master

Device Address Byte

Word Address Byte

MSB

MSB

1

2

3

4

5

6

7

8

9

1

2

3

4

5

6

7

8

9

1

0

1

0

A

2

A

1

A

0

0

0

Dummy Write

Start

by

Master

Device Address Byte

Data Word (n)

Stop

by

Master

MSB

MSB

1

2

3

4

5

6

7

8

9

1

2

3

4

5

6

7

8

9

1

0

1

0

A

2

A

1

A

0

1

0

D7

D6

D5

D4

D3

D2

D1

D0

1

A7

A6

A5

A4

A3

A2

A1

A0

0

ACK

from

Slave

ACK

from

Slave

ACK

from

Slave

NACK

from

Master

SCL

SDA

Start

by

Master

ACK

from

Slave

ACK

from

Master

Device Address Byte

Data Word (n)

MSB

MSB

1

2

3

4

5

6

7

8

9

1

2

3

4

5

6

7

8

9

1

0

1

0

A

2

A

1

A

0

1

0

D7

D6

D5

D4

D3

D2

D1

D0

0

ACK

from

Master

NACK

from

Master

Stop

by

Master

ACK

from

Master

Data Word (n+1)

Data Word (n+2)

Data Word (n+x)

1

2

3

4

5

6

7

8

9

1

2

3

4

5

6

7

8

9

1

2

3

4

5

6

7

8

9

D7

D6

D5

D4

D3

D2

D1

D0

0

D7

D6

D5

D4

D3

D2

D1

D0

0

D7

D6

D5

D4

D3

D2

D1

D0

1

MSB

MSB

MSB