AT24C01D and AT24C02D [DATASHEET]

Atmel-8871B-SEEPROM-AT24C01D-02D-Datasheet_032014

5

3.3

Acknowledge and No-Acknowledge

After every byte of data is received, the receiving device must confirm to the Master that it has successfully

received the data byte by responding with what is known as an acknowledge (ACK). An ACK is accomplished by

the transmitting device first releasing the SDA line at the falling edge of the eighth clock cycle followed by the

receiving device responding with a Logic 0 during the entire high period of the ninth clock cycle.

When the AT24C01D/02D is transmitting data to the Master, the Master can indicate that it is done receiving data

and wants to end the operation by sending a Logic 1 response to the AT24C01D/02D instead of an ACK response

during the ninth clock cycle. This is known as a no-acknowledge (NACK) and is accomplished by the Master

sending a Logic 1 during the ninth clock cycle, at which point the AT24C01D/02D will release the SDA line so the

Master can then generate a Stop condition.

The transmitting device, which can be the bus Master or the Serial EEPROM, must release the SDA line at the

falling edge of the eighth clock cycle to allow the receiving device to drive the SDA line to a Logic 0 to ACK the

previous 8-bit word. The receiving device must release the SDA line at the end of the ninth clock cycle to allow the

transmitter to continue sending new data. A timing diagram has been provided in Figure 3-1 to better illustrate

these requirements.

Figure 3-1.

Start Condition, Data Transitions, Stop Condition and Acknowledge

3.4

Standby Mode

The AT24C01D/02D features a low power standby mode which is enabled when any one of the following occurs:



A valid power-up sequence is performed (see Section 8.6, “Power-Up Requirements and Reset Behavior”).



A Stop condition is received by the device unless it initiates an internal write cycle (see Section 5.).



At the completion of an internal write cycle (see Section 5., “Write Operations”).



An unsuccessful match of the device type identifier or hardware address in the Device Address byte occurs

(see Section 4.1, “Device Addressing”).



The bus Master does not ACK the receipt of data read out from the device; instead it sends a NACK

response (see Section 6., “Read Operations”).

SCL

SDA

SDA

Must Be

Stable

SDA

Change

Allowed

SDA

Change

Allowed

Acknowledge

Valid

Stop

Condition

Start

Condition

12

89

SDA

Must Be

Stable

Acknowledge Window

The transmitting device (Master or Slave)

must release the SDA line at this point to allow

the receiving device (Master or Slave) to drive the

SDA line low to ACK the previous 8-bit word.

The receiver (Master or Slave)

must release the SDA line at

this point to allow the transmitter

to continue sending new data.