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PIC18LC658T-E/CL Datasheet(PDF) 26 Page - Microchip Technology

Part # PIC18LC658T-E/CL
Description  High-Performance Microcontrollers with CAN Module
PDF  366 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18LC658T-E/CL Datasheet(HTML) 26 Page - Microchip Technology

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PIC18CXX8
DS30475A-page 26
Advanced Information
 2000 Microchip Technology Inc.
2.6.2
OSCILLATOR TRANSITIONS
The PIC18CXX8 devices contain circuitry to prevent
"glitches" when switching between oscillator sources.
Essentially, the circuitry waits for eight rising edges of
the clock source that the processor is switching to.
This ensures that the new clock source is stable and
that its pulse width will not be less than the shortest
pulse width of the two clock sources.
A timing diagram indicating the transition from the
main oscillator to the Timer1 oscillator is shown in
Figure 2-7. The Timer1 oscillator is assumed to be
running all the time. After the SCS bit is set, the pro-
cessor is frozen at the next occurring Q1 cycle. After
eight synchronization cycles are counted from the
Timer1 oscillator, operation resumes. No additional
delays are required after the synchronization cycles.
The sequence of events that takes place when switch-
ing from the Timer1 oscillator to the main oscillator will
depend on the mode of the main oscillator. In addition
to eight clock cycles of the main oscillator, additional
delays may take place.
If the main oscillator is configured for an external crys-
tal (HS, XT, LP), the transition will take place after an
oscillator start-up time (TOST) has occurred. A timing
diagram indicating the transition from the Timer1 oscil-
lator to the main oscillator for HS, XT and LP modes is
shown in Figure 2-8.
FIGURE 2-7:
TIMING DIAGRAM FOR TRANSITION FROM OSC1 TO TIMER1 OSCILLATOR
FIGURE 2-8:
TIMING DIAGRAM FOR TRANSITION BETWEEN TIMER1 AND OSC1 (HS,XT,LP)
Q3
Q2
Q1
Q4
Q3
Q2
OSC1
Internal
SCS
(OSCCON<0>)
Program
PC + 2
PC
Note 1:
Delay on internal system clock is eight oscillator cycles for synchronization.
Q1
T1OSI
Q4
Q1
PC + 4
Q1
Tscs
Clock
Counter
System
Q2
Q3
Q4
Q1
TDLY
TT1P
TOSC
2
1
3
4
5678
Q3
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
OSC1
Internal System
SCS
(OSCCON<0>)
Program Counter
PC
PC + 2
Note 1:
TOST = 1024TOSC (drawing not to scale).
T1OSI
Clock
OSC2
TOST
Q1
PC + 4
TT1P
TOSC
TSCS
1
2
3
4
567
8



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