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PIC18LC658T-E/CL Datasheet(PDF) 90 Page - Microchip Technology |
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PIC18LC658T-E/CL Datasheet(HTML) 90 Page - Microchip Technology |
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90 / 366 page  PIC18CXX8 DS30475A-page 90 Advanced Information 2000 Microchip Technology Inc. FIGURE 8-2: RA4/T0CKI PIN BLOCK DIAGRAM FIGURE 8-3: RA6 BLOCK DIAGRAM TABLE 8-1: PORTA FUNCTIONS TABLE 8-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA Data Bus WR TRISA RD PORTA Data Latch TRIS Latch RD TRISA Schmitt Trigger Input Buffer N VSS I/O Pin(1) TMR0 Clock Input Note 1: I/O pin has diode protection to VSS only. Q D Q CK Q D Q CK EN QD EN RD LATA WR LATA or WR PORTA Data Bus Q D Q CK QD EN P N WR LATA WR Data Latch TRIS Latch RD TRISA RD PORTA VSS VDD I/O Pin(1) Note 1: I/O pins have diode protection to VDD and VSS. or WR PORTA RD LATA ECRA6 or Data Bus ECRA6 or Enable Data Bus TTL Input Buffer RCRA6 RCRA6 Enable TRISA Q D Q CK Name Bit# Buffer Function RA0/AN0 bit0 TTL Input/output or analog input. RA1/AN1 bit1 TTL Input/output or analog input. RA2/AN2/VREF- bit2 TTL Input/output or analog input or VREF-. RA3/AN3/VREF+ bit3 TTL Input/output or analog input or VREF+. RA4/T0CKI bit4 ST/OD Input/output or external clock input for Timer0 output is open drain type. RA5/SS/AN4/LVDIN bit5 TTL Input/output or slave select input for synchronous serial port or analog input, or low voltage detect input. OSC2/CLKO/RA6 bit6 TTL OSC2 or clock output or I/O pin. Legend: TTL = TTL input, ST = Schmitt Trigger input, OD = Open Drain Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other RESETS PORTA — RA6 RA5 RA4 RA3 RA2 RA1 RA0 -x0x 0000 -uuu uuuu LATA — Latch A Data Output Register -xxx xxxx -uuu uuuu TRISA — PORTA Data Direction Register -111 1111 -111 1111 ADCON1 — — VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0 --00 0000 --uu uuuu Legend: x = unknown, u = unchanged, - = unimplemented locations read as '0'. Shaded cells are not used by PORTA. |
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