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PIC18LC658T-E/CL Datasheet(PDF) 47 Page - Microchip Technology

Part # PIC18LC658T-E/CL
Description  High-Performance Microcontrollers with CAN Module
PDF  366 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18LC658T-E/CL Datasheet(HTML) 47 Page - Microchip Technology

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 2000 Microchip Technology Inc.
Advanced Information
DS30475A-page 47
PIC18CXX8
4.7.1
TWO WORD INSTRUCTIONS
The PIC18CXX8 devices have 4 two word instructions:
MOVFF, CALL, GOTO
and LFSR. The second word of
these instructions has the 4 MSB’s set to 1’s and is a
special kind of NOP instruction. The lower 12 bits of the
second word contain data to be used by the instruction.
If the first word of the instruction is executed, the data
in the second word is accessed. If the second word of
the instruction is executed by itself (first word was
skipped), it will execute as a NOP. This action is neces-
sary when the two word instruction is preceded by a
conditional instruction that changes the PC. A program
example that demonstrates this concept is shown in
Example 4-3. Refer to Section 19.0 for further details of
the instruction set.
4.8
Lookup Tables
Lookup tables are implemented two ways. These are:
• Computed GOTO
• Table Reads
4.8.1
COMPUTED GOTO
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL).
A lookup table can be formed with an ADDWF
PCL
instruction and a group of RETLW
0xnn
instructions.
WREG is loaded with an offset into the table before exe-
cuting a call to that table. The first instruction of the called
routine is the ADDWF PCL instruction. The next instruc-
tion executed will be one of the RETLW 0xnn instruc-
tions that returns the value 0xnn to the calling function.
The offset value (value in WREG) specifies the number
of bytes that the program counter should advance.
In this method, only one data byte may be stored in
each instruction location and room on the return
address stack is required.
4.8.2
TABLE READS/TABLE WRITES
A better method of storing data in program memory
allows 2 bytes of data to be stored in each instruction
location.
Lookup table data may be stored as 2 bytes per pro-
gram word by using table reads and writes. The table
pointer (TBLPTR) specifies the byte address and the
table latch (TABLAT) contains the data that is read
from, or written to, program memory. Data is trans-
ferred to/from program memory one byte at a time.
A description of the Table Read/Table Write operation
is shown in Section 5.0.
EXAMPLE 4-3:
TWO WORD INSTRUCTIONS
Warning:
The LSb of PCL is fixed to a value of ‘0’.
Hence, computed GOTO to an odd
address is not possible.
CASE 1:
Object Code
Source Code
0110 0110 0000 0000
TSTFSZ
REG1
; is RAM location 0?
1100 0001 0010 0011
MOVFF
REG1, REG2 ; No, execute 2-word instruction
1111 0100 0101 0110
; 2nd operand holds address of REG2
0010 0100 0000 0000
ADDWF
REG3
; continue code
CASE 2:
Object Code
Source Code
0110 0110 0000 0000
TSTFSZ
REG1
; is RAM location 0?
1100 0001 0010 0011
MOVFF
REG1, REG2 ; Yes
1111 0100 0101 0110
; 2nd operand becomes NOP
0010 0100 0000 0000
ADDWF
REG3
; continue code



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