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PIC16LC773-04/SP Datasheet(PDF) 133 Page - Microchip Technology |
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PIC16LC773-04/SP Datasheet(HTML) 133 Page - Microchip Technology |
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133 / 200 page ![]() PIC16C77X © 1999 Microchip Technology Inc. Advance Information DS30275A-page 133 12.8 Time-out Sequence On power-up the time-out sequence is as follows: First PWRT time-out is invoked by the POR pulse. When the PWRT delay expires the Oscillator Start-up Timer is activated. The total time-out will vary based on oscilla- tor configuration and the status of the PWRT. For exam- ple, in RC mode with the PWRT disabled, there will be no time-out at all. Figure 12-7, Figure 12-8, Figure 12- 9 and Figure 12-10 depict time-out sequences on power-up. Since the time-outs occur from the POR pulse, if MCLR is kept low long enough, the time-outs will expire. Then bringing MCLR high will begin execution immediately (Figure 12-9). This is useful for testing purposes or to synchronize more than one PICmicro microcontroller operating in parallel. Table 12-5 shows the reset conditions for some special function registers, while Table 12-6 shows the reset conditions for all the registers. 12.9 Power Control/Status Register (PCON) The Power Control/Status Register, PCON has two sta- tus bits that provide indication of which power-up type reset occurred. Bit0 is Brown-out Reset Status bit, BOR. Bit BOR is set on a Power-on Reset. It must then be set by the user and checked on subsequent resets to see if bit BOR cleared, indicating a BOR occurred. However, if the brown-out circuitry is disabled, the BOR bit is a "Don’t Care" bit and is considered unknown upon a POR. Bit1 is POR (Power-on Reset Status bit). It is cleared on a Power-on Reset and unaffected otherwise. The user must set this bit following a Power-on Reset. TABLE 12-3 TIME-OUT IN VARIOUS SITUATIONS TABLE 12-4 STATUS BITS AND THEIR SIGNIFICANCE TABLE 12-5 RESET CONDITION FOR SPECIAL REGISTERS Oscillator Configuration Power-up Brown-out Wake-up from SLEEP PWRTE = 0 PWRTE = 1 XT, HS, LP 72 ms + 1024TOSC 1024TOSC 72 ms + 1024TOSC 1024TOSC RC 72 ms — 72 ms — POR BOR TO PD 01 1 1 Power-on Reset 0x 0 x Illegal, TO is set on POR 0x x 0 Illegal, PD is set on POR 10 1 1 Brown-out Reset 11 0 1 WDT Reset 11 0 0 WDT Wake-up 11 u u MCLR Reset during normal operation 11 1 0 MCLR Reset during SLEEP or interrupt wake-up from SLEEP Condition Program Counter STATUS Register PCON Register Power-on Reset 000h 0001 1xxx ---- --01 MCLR Reset during normal operation 000h 000u uuuu ---- --uu MCLR Reset during SLEEP 000h 0001 0uuu ---- --uu WDT Reset 000h 0000 1uuu ---- --uu WDT Wake-up PC + 1 uuu0 0uuu ---- --uu Brown-out Reset 000h 0001 1uuu ---- --u0 Interrupt wake-up from SLEEP PC + 1(1) uuu1 0uuu ---- --uu Legend: u = unchanged, x = unknown, - = unimplemented bit read as '0'. Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). |
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