PIC16LC773-04SLASHSP datasheet(131/200 Pages) MICROCHIP

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PIC16C77X

Advance Information

DS30275A-page 131

12.3

Reset

The PIC16C77X devices have several different resets.

These resets are grouped into two classifications;

power-up and non-power-up. The power-up type resets

are the power-on and brown-out resets which assume

the device VDD was below its normal operating range

for the device’s configuration. The non-power up type

resets assume normal operating limits were main-

tained before/during and after the reset.

• Power-on Reset (POR)

• Brown-out Reset (BOR)

•MCLR reset during normal operation

•MCLR reset during SLEEP

• WDT Reset (during normal operation)

Some registers are not affected in any reset condition.

Their status is unknown on a power-up reset and

unchanged in any other reset. Most other registers are

placed into an initialized state upon reset, however they

are not affected by a WDT reset during sleep because

this is considered a WDT Wakeup, which is viewed as

the resumption of normal operation.

Several status bits have been provided to indicate

which reset occurred (see Table 12-4). See Table 12-6

for a full description of reset states of all registers.

A simplified block diagram of the on-chip reset circuit is

shown in Figure 12-5.

These devices have a MCLR noise filter in the MCLR

reset path. The filter will detect and ignore small pulses.

It should be noted that a WDT Reset does not drive

MCLR pin low.

FIGURE 12-5: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT

External

Reset

MCLR

VDD

OSC1

WDT

Module

VDD rise

detect

OST/PWRT

On-chip

RC OSC

WDT

Time-out

Power-on Reset

OST

10-bit Ripple counter

PWRT

Chip_Reset

10-bit Ripple counter

Reset

Enable OST

Enable PWRT

SLEEP

Note 1:

This is a separate oscillator from the RC oscillator of the CLKIN pin.

Brown-out

Reset

BODEN

(1)

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