| Electronic Components Datasheet Search |
|
WM8962B Datasheet(PDF) 27 Page - Wolfson Microelectronics plc |
|
|
|||||||||||||||||||||||||||||
WM8962B Datasheet(HTML) 27 Page - Wolfson Microelectronics plc |
|
27 / 295 page ![]() WM8962 Rev 4.3 27 DIGITAL AUDIO INTERFACE - MASTER MODE BCLK (Output) ADCDAT LRCLK (Output) t DL DACDAT t DDA t DHT t DST Figure 3 Audio Interface Timing - Master Mode Test Conditions The following timing information is valid across the full range of recommended operating conditions. PARAMETER SYMBOL MIN TYP MAX UNIT Audio Interface Timing - Master Mode LRCLK propagation delay from BCLK falling edge tDL 10 ns ADCDAT propagation delay from BCLK falling edge tDDA 14 ns DACDAT setup time to BCLK rising edge tDST 10 ns DACDAT hold time from BCLK rising edge tDHT 10 ns |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |