OV7620 datasheet(23/60 Pages) ETC

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OV7620 Product Specifications - Rev. 1.2 (5/13/00)

OMNIVISION TECHNOLOGIES INC.

Preliminary Company Confidential

1.10 Slave Mode Operation

OV7620 can be programmable to be slave device. Default OV7620 is a master device, it provide

Hsync, Vsync output. If used as slave device, (register 29 bit 6=1), external master device must

provide:

System clock CLK to XCLK1 pin;

Horizontal sync Hsync to CHSYNC pin, positive acted.

Vertical frame sync Vsync to VSYNC pin, positive acted.

When in slave mode, OV7620 tri-state CHSYNC and VSYNC output pin and use as input pin. To

synchronize the chip, OV7620 use external system clock CLK synchronize external horizontal

sync Hsync, then use synchronized horizontal sync to synchronize external vertical frame sync

Vsync. But to match internal counter, these three must keep exact relation as below:

Hsync period is 2*858 * CLK

Vsync period is 525* 2*858 * CLK

FIG 1.5 Slave Mode External Sync Timing

OV7620 will be stable after 1 frame. (2nd Vsync).

1.11 Frame Exposure Mode

OV7620 support frame exposure mode when in Progressive Scan Mode. When the FREX pin is

used as an external master device sets the exposure time. When FREX =1, the whole array is

precharged. The exposure time is then determined by the external master device which controls

FREX. When FREX=0, the OV7620 begins to output data line by line. While data is output, the

OV7620 must be blocked from light by using a mechanical shutter, so that the whole array is ex-

posed at the same time and has the same exposure period. In default line exposure mode, the

array precharge and read mode is first charge 1st line, after one line read out, precharge 2nd

line, so on. the width of FREX=1 must large the a fixed timing to make sure whole array has been

precharged.

Frame exposure mode timing is as below:

CLK

Hsync

Vsync

1 frame = 525*2*858*Tclk

1 line=2*858*Tclk

Tclk

Tvs

Note: (1) Ths > 6*Tclk (2) Ths < Tvs < 2*858*Tclk

Ths

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