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OV7620 Datasheet(PDF) 38 Page - List of Unclassifed Manufacturers |
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OV7620 Datasheet(HTML) 38 Page - List of Unclassifed Manufacturers |
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38 / 60 page ![]() OV7620 Product Specifications - Rev. 1.2 (5/13/00) OMNIVISION TECHNOLOGIES INC. 38 Preliminary Company Confidential MIDL<7:0>- read only, always returns “A2” Register 1E ~ 1F- rw: Reserved These two registers are reserved for internal use. Write data to these registers will not function. Register 20- rw: Common control E COME7 - Modified CCIR656 format vertical sizing enabled. “1” will enable vertical windowing function. “0” will limit vertical size to 480 lines - unchanged by [19] and [1B ]. COME6 - Field luminance average signal generation enable.Value is stored in register [7C] COME5 - “1” First stage aperture correction enable. Correction strength will be decided by register [07]. “0” disable first stage aperture correction. COME4 - “1” Second stage aperture correction enable. Correction strength and threshold value will be decided by register 26 bit 7 ~ register 26 bit 4. COME3 - AWB smart mode enable. 1 - Drop out pixel when compare pixel red, blue and green component level to change register [01] and [02], which luminance level is higher than presetting level and lower than presetting level, this two level is set by register [0F]. 0 - calculate all pixels to get AWB result. Valid only when register 13 bit 0=1 and register 12 bit 2=1 COME2 - Reserved. COME1 - AWB fast/slow mode selection. “1” - AWB is always fast mode, that is register [01] and [02] is changed every field/frame. “0” AWB is slow mode, [01] and [02] change every 16/64 field/ frame decided by register 70 bit 1. When AWB enable, register 12 bit 2=1, AWB is working as fast mode at first 1024 field/frame, than as slow mode later. COME0 - Digital output driver capability increase selection: “1” Double digital output driver current; “0” low output driver current status. Y6-Y0: Y channel digital output offset adjustment. Range: +127mV ~ -127mV. If COMG2=0, this register will be updated by internal auto A/D BLC circuit, and write a value to this register with SCCB has no effect. If COMG2=1, Y channel offset adjustment will use the register stored value which can be changed by SCCB. If COMF1=0, this register has no adjustment effect to A/D output data. If output RGB raw data, this register will adjust R/G/B data. Y7: Offset adjustment direction 0 - Add Y[6:0]; 1 - Subtract Y[6:0]. Bits COME7 COME6 COME5 COME4 COME3 COME2 COME1 COME0 Default 0 0 0 0 0 - 0 0 Register 21- rw: Y Channel Offset Adjustment Bits Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 Default 1 0 0 0 0 0 0 0 |
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