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OV7620 Datasheet(PDF) 32 Page - List of Unclassifed Manufacturers |
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OV7620 Datasheet(HTML) 32 Page - List of Unclassifed Manufacturers |
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32 / 60 page ![]() OV7620 Product Specifications - Rev. 1.2 (5/13/00) OMNIVISION TECHNOLOGIES INC. 32 Preliminary Company Confidential Register 14- rw: Common control C COMC7 - AWB activation threshold selection: 1- high; 0-low. COMC6 - Reserved. COMC5 - QVGA digital output format selection. 1 - 320x240; 0 - 640x480. COMC4 - Field/Frame vertical sync output in VSYNC port selection: 1 - frame sync, only inserted in ODD field vertical sync; 0 - field vertical sync, effect in Interlaced mode COMC3 - HREF polarity selection: 0 - HREF positive effective, 1 - HREF negative. COMC2 - RGB gamma selection: 1 - Gamma on, value defined by register [62] value; 0 - gamma is 1 (lin- ear). COMC1 - Reserved. COMC0 - Reserved. COMD7 - Reserved. COMD6 - PCLK polarity selection. “0” OV7620 output data at PCLK falling edge and data bus will be stable at PCLK rising edge; “1” rising edge output data and stable at PCLK falling edge. When OV7620 work as CCIR656 format, COMB4=1, this bit is disable and should use PCLK rising edge latch data bus. COMD<5:1> - Reserved. COMD0 - U V digital output sequence exchange control. 0 - V U V U ... for 16Bit, V Y U Y ... for 8 Bit; 1- U V U V ... for 16Bit and U Y V Y ... for 8 Bit. FD<7:2>- Frame drop selection, it operates in ODD and EVEN mode as defined by FD<1:0>, it is ignored in OFF & FRAME mode. Its purpose is to divide the video signal into programmed number of time slots in unit of field/frame, and to allow HREF to be active only one field/frame during the period. This function does not affect the video data or pixel rate. 000000 - 000001: disable digital data output, only output black reference level. 000010 - 111111: Output 1 of (2 ~ 63) frame. If set register 33 bit 1= 1, that means only drop 1 frame from (2 ~ 63) frame. Bits COMC7 COMC6 COMC5 COMC4 COMC3 COMC2 COMC1 COMC0 Default 0 - 0 0 0 1 - - Register 15- rw: Common control D Bits COMD7 COMD6 COMD5 COMD4 COMD3 COMD2 COMD1 COMD0 Default - 0 - - - - - 1 Register 16 - rw: Frame Drop Bits FD7 FD6 FD5 FD4 FD3 FD2 FD1 FD0 Default 0 0 0 0 0 0 1 1 |
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