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HT45F5R Datasheet(PDF) 48 Page - Holtek Semiconductor Inc |
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HT45F5R Datasheet(HTML) 48 Page - Holtek Semiconductor Inc |
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48 / 138 page  Rev. 1.10 48 De�e��e� 1�� �01� Rev. 1.10 49 De�e��e� 1�� �01� HT45F5R Charger ASSP Flash MCU HT45F5R Charger ASSP Flash MCU Bit1 Unimplemented,readas"0" Bit0 WRF:WDTcontrolregistersoftwareresetflag 0:Notoccur 1:Occurred Thisbitissetto1bytheWDTcontrolregistersoftwareresetandclearedbythe applicationprogram.Notethatthisbitcanonlybeclearedto0bytheapplication program. Watchdog Timer Operation TheWatchdogTimeroperatesbyprovidingadeviceresetwhenitstimeroverflows.Thismeans thatintheapplicationprogramandduringnormaloperationtheuserhastostrategicallyclearthe WatchdogTimerbeforeitoverflowstopreventtheWatchdogTimerfromexecutingareset.Thisis doneusingtheclearwatchdoginstructions.Iftheprogrammalfunctionsforwhateverreason,jumps toanunknownlocation,orentersanendlessloop,theseclearinstructionswillnotbeexecutedinthe correctmanner,inwhichcasetheWatchdogTimerwilloverflowandresetthedevice.Withregardto theWatchdogTimerenable/disablefunction,therearefivebits,WE4~WE0,intheWDTCregister toofferadditionalenable/disableandresetcontroloftheWatchdogTimer.TheWDTfunction willbedisabledwhentheWE4~WE0bitsaresettoavalueof10101B.TheWDTfunctionwillbe enablediftheWE4~WE0bitsvalueisequalto01010B.IftheWE4~WE0bitsaresettoanyother valuesbytheenvironmentalnoiseorsoftwaresetting,except01010Band10101B,itwillresetthe deviceafter2~3LIRCclockcycles.Afterpoweronthesebitswillhavethevalueof01010B. WE4 ~ WE0 Bits WDT Function 10101B Disa�le 01010B Ena�le Any othe� value Reset MCU Watchdog Timer Enable/Disable Control Undernormalprogramoperation,aWatchdogTimertime-outwillinitialiseadeviceresetandset thestatusbitTO.However,ifthesystemisintheSLEEPorIDLEMode,whenaWatchdogTimer time-outoccurs,theTObitinthestatusregisterwillbesetandonlytheProgramCounterandStack Pointerwillbereset.ThreemethodscanbeadoptedtoclearthecontentsoftheWatchdogTimer. ThefirstisaWDTreset,whichmeansacertainvalueexcept01010Band10101Bwrittenintothe WE4~WE0bitfiled,thesecondisusingtheWatchdogTimersoftwareclearinstructionsandthe thirdisviaaHALTinstruction. ThereisonlyonemethodofusingsoftwareinstructiontocleartheWatchdogTimer.Thatistouse thesingle"CLRWDT"instructiontocleartheWDT. Themaximumtimeoutperiodiswhenthe215divisionratioisselected.Asanexample,witha 32kHzLIRCoscillatorasitssourceclock,thiswillgiveamaximumwatchdogperiodofaround1 secondforthe215divisionratio,andaminimumtimeoutof8msforthe28divisionration. “ CLR WDT”Inst�u�tion 8-stage Divide� WDT P�es�ale� WE4~WE0 �its WDTC Registe� Reset MCU fLIRC fLIRC/�8 8-to-1 MUX CLR WS�~WS0 WDT Ti�e-out (�8/fLIRC ~ �15/fLIRC) “ HALT”Inst�u�tion LIRC Watchdog Timer |
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