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HT45F5R Datasheet(PDF) 65 Page - Holtek Semiconductor Inc |
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HT45F5R Datasheet(HTML) 65 Page - Holtek Semiconductor Inc |
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65 / 138 page  Rev. 1.10 �4 De�e��e� 1�� �01� Rev. 1.10 �5 De�e��e� 1�� �01� HT45F5R Charger ASSP Flash MCU HT45F5R Charger ASSP Flash MCU STMC0 Register Bit 7 6 5 4 3 2 1 0 Na�e STPAU STCK� STCK1 STCK0 STON STRP� STRP1 STRP0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 Bit7 STPAU:STMcounterpausecontrol 0:Run 1:Pause Thecountercanbepausedbysettingthisbithigh.Clearingthebittozerorestores normalcounteroperation.WheninaPauseconditiontheSTMwillremainpowered upandcontinuetoconsumepower.Thecounterwillretainitsresidualvaluewhen thisbitchangesfromlowtohighandresumecountingfromthisvaluewhenthebit changestoalowvalueagain. Bit6~4 STCK2~STCK0:SelectSTMcounterclock 000:fSYS/4 001:fSYS 010:fH/16 011:fH/64 100:fSUB 101:fSUB 110:STCKrisingedgeclock 111:STCKfallingedgeclock ThesethreebitsareusedtoselecttheclocksourcefortheSTM.Theexternalpinclock sourcecanbechosentobeactiveontherisingorfallingedge.TheclocksourcefSYSis thesystemclock,whilefHandfTBCareotherinternalclocks,thedetailsofwhichcan befoundintheoscillatorsection. Bit3 STON:STMcounteron/offcontrol 0:Off 1:On Thisbitcontrolstheoverallon/offfunctionoftheSTM.Settingthebithighenables thecountertorun,clearingthebitdisablestheSTM.Clearingthisbittozerowill stopthecounterfromcountingandturnofftheSTMwhichwillreduceitspower consumption.Whenthebitchangesstatefromlowtohightheinternalcountervalue willberesettozero,howeverwhenthebitchangesfromhightolow,theinternal counterwillretainitsresidualvalueuntilthebitreturnshighagain.IftheSTMisin theCompareMatchOutputModeorthePWMoutputModeorSinglePulseOutput ModethentheSTMoutputpinwillberesettoitsinitialcondition,asspecifiedbythe STOCbit,whentheSTONbitchangesfromlowtohigh. Bit2~0 STRP2~STRP0:STMCCRP3-bitregister,comparedwiththeSTMCounterbit9~bit7 ComparatorPmatchperiod 000:1024STMclocks 001:128STMclocks 010:256STMclocks 011:384STMclocks 100:512STMclocks 101:640STMclocks 110:768STMclocks 111:896STMclocks ThesethreebitsareusedtosetupthevalueontheinternalCCRP3-bitregister,which arethencomparedwiththeinternalcounter’shighestthreebits.Theresultofthis comparisoncanbeselectedtocleartheinternalcounteriftheSTCCLRbitissettozero. SettingtheSTCCLRbittozeroensuresthatacomparematchwiththeCCRPvalues willresettheinternalcounter.AstheCCRPbitsareonlycomparedwiththehighest threecounterbits,thecomparevaluesexistin128clockcyclemultiples.Clearingall threebitstozeroisineffectallowingthecountertooverflowatitsmaximumvalue. |
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