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HT45F5R Datasheet(PDF) 96 Page - Holtek Semiconductor Inc |
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HT45F5R Datasheet(HTML) 96 Page - Holtek Semiconductor Inc |
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96 / 138 page  Rev. 1.10 9� De�e��e� 1�� �01� Rev. 1.10 97 De�e��e� 1�� �01� HT45F5R Charger ASSP Flash MCU HT45F5R Charger ASSP Flash MCU SACS3~SACS0bitscandeterminewhichexternalchannelisselected.Iftheinternalanalogsignal isselectedtobeconverted,theSACS3~SACS0bitsmustbeconfiguredwithavaluefrom1000to 1111toswitchofftheexternalanalogchannelinput.Otherwise,theinternalanalogsignalwillbe connectedtogetherwiththeexternalchannelinput.Thiswillresultinunpredictablesituations. SAINS[2:0] SACS[3:0] Input Signals Description 000� 101~111 0000~1000 AN0~AN��Vsense Exte�nal pin analog input 1001~1111 — Non-existed channel, input is floating 001 1001~1111 VBG Inte�nal Bandgap �efe�en�e voltage 010 1001~1111 10×IS 10 ti�es Isense input voltage signal 011 1001~1111 VDPVDO USB D+ inte�nal divide� �egiste�s output voltage 100 1001~1111 VDNVDO USB D- inte�nal divide� �egiste�s output voltage A/D Converter Input Signal Selection Conversion Rate and Timing Diagram AcompleteA/Dconversioncontainstwoparts,datasamplinganddataconversion.Thedata samplingwhichisdefinedastADStakes4A/Dclockcyclesandthedataconversiontakes12A/D clockcycles.Thereforeatotalof16A/DclockcyclesforanexternalinputA/Dconversionwhichis definedastADCarenecessary. MaximumsingleA/Dconversionrate=A/Dclockperiod/16 Theaccompanyingdiagramshowsgraphicallythevariousstagesinvolvedinananalogtodigital conversionprocessanditsassociatedtiming.AfteranA/Dconversionprocesshasbeeninitiated bytheapplicationprogram,themicrocontrollerinternalhardwarewillbegintocarryoutthe conversion,duringwhichtimetheprogramcancontinuewithotherfunctions.Thetimetakenforthe A/Dconversionis16tADCKclockcycleswheretADCKisequaltotheA/Dclockperiod. ADCEN START ADBZ SACS[�:0] (SAINS[�:0]=000) off on off on tON�ST tADS A/D sa�pling ti�e tADS A/D sa�pling ti�e Sta�t of A/D �onve�sion Sta�t of A/D �onve�sion Sta�t of A/D �onve�sion End of A/D �onve�sion End of A/D �onve�sion tADC A/D �onve�sion ti�e tADC A/D �onve�sion ti�e tADC A/D �onve�sion ti�e 0011B 0010B 0000B 0001B A/D �hannel swit�h A/D Conversion Timing – External Channel Input |
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