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HT45F5R Datasheet(PDF) 67 Page - Holtek Semiconductor Inc |
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HT45F5R Datasheet(HTML) 67 Page - Holtek Semiconductor Inc |
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67 / 138 page ![]() Rev. 1.10 �� De�e��e� 1�� �01� Rev. 1.10 �7 De�e��e� 1�� �01� HT45F5R Charger ASSP Flash MCU HT45F5R Charger ASSP Flash MCU Bit3 STOC:STPoutputcontrolbit Comparematchoutputmode 0:Initiallow 1:Initialhigh PWMoutputmode/singlepulseoutputmode 0:Activelow 1:Activehigh ThisistheoutputcontrolbitfortheSTMoutputpin.Itsoperationdependsupon whetherSTMisbeingusedintheCompareMatchOutputModeorinthePWMoutput Mode/SinglePulseOutputMode.IthasnoeffectiftheSTMisintheTimer/Counter Mode.IntheCompareMatchOutputModeitdeterminesthelogicleveloftheSTM outputpinbeforeacomparematchoccurs.InthePWMoutputModeitdeterminesifthe PWMsignalisactivehighoractivelow.IntheSinglePulseOutputModeitdetermines thelogicleveloftheSTMoutputpinwhentheSTONbitchangesfromlowtohigh. Bit2 STPOL:STPoutputpolaritycontrol 0:Non-invert 1:Invert ThisbitcontrolsthepolarityoftheSTMoutputpin.WhenthebitissethightheSTM outputpinwillbeinvertedandnotinvertedwhenthebitiszero.Ithasnoeffectifthe STMisintheTimer/CounterMode. Bit1 STDPX:STMPWMperiod/dutycontrol 0:CCRP–period;CCRA-duty 1:CCRP–duty;CCRA-period Thisbit,determineswhichoftheCCRAandCCRPregistersareusedforperiodand dutycontrolofthePWMwaveform. Bit0 STCCLR:SelectSTMcounterclearcondition 0:STMComparatorPmatch 1:STMComparatorAmatch Thisbitisusedtoselectthemethodwhichclearsthecounter.Rememberthatthe StandardSTMcontainstwocomparators,ComparatorAandComparatorP,eitherof whichcanbeselectedtocleartheinternalcounter.WiththeSTCCLRbitsethigh, thecounterwillbeclearedwhenacomparematchoccursfromtheComparatorA. Whenthebitislow,thecounterwillbeclearedwhenacomparematchoccursfrom theComparatorPorwithacounteroverflow.Acounteroverflowclearingmethodcan onlybeimplementediftheCCRPbitsareallclearedtozero.TheSTCCLRbitisnot usedinthePWMoutputmode,SinglePulseorInputCaptureMode. STMDL Register Bit 7 6 5 4 3 2 1 0 Na�e D7 D� D5 D4 D� D� D1 D0 R/W R R R R R R R R POR 0 0 0 0 0 0 0 0 Bit7~0 D7~D0:STMcounterlowbyteregisterbit7~bit0 STM10-bitcounterbit7~bit0 STMDH Register Bit 7 6 5 4 3 2 1 0 Na�e — — — — — — D9 D8 R/W — — — — — — R R POR — — — — — — 0 0 Bit7~2 Unimplemented,readas"0" Bit1~0 D9~D8:STMcounterhighbyteregisterbit1~bit0 STM10-bitcounterbit9~bit8 |
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