PCD6003 datasheet(57/96 Pages) PHILIPS

57 / 96 page

2001 Apr 17

Philips Semiconductors

Product speciﬁcation

Digital telephone answering machine chip

PCD6003

12.1.1

DTAM EXTERNAL MEMORY USING A PARALLEL FLASH

A parallel flash memory can be connected to the PCD6003 chip as shown in Fig.23. The MAGP and P2GP bits in the

XRAM-mapped Configuration Register (ConfReg) must be set. Clearing P4.3 will enable the flash memory.

12.1.2

DTAM EXTERNAL MEMORY INTERFACE USING A 4-WIRE SERIAL FLASH

A 4-wire serial flash memory (like SPI or Microwire flash memory) can be connected to the PCD6003 chip as shown in

Fig.24. P4.3 must be level shifted when using a 5 V serial flash memory. P4.1 and P4.2 must be pulled to 3 V with a

resistor. When using a 5 V flash memory the DO output of the flash must be level-shifted to 3 V with 2 resistors

(1 and 1.5 k

Ω).

handbook, full pagewidth

MBL273

1 k

Ω

P4.3

1 k

Ω

CEN

OEN

RY/BYN

P3.x

P1.x

P2, MA7 to MA0 and P4.0 to P4.2

VDD3V

IO7 to IO0

A18 to A0

A19

PCD6003

4/8 MBIT

FLASH

Fig.23 Parallel flash memory connection.

handbook, full pagewidth

MBL274

1 k

Ω

P4.3

1 k

Ω

CEN

P4.4/FSI

P4.2/FSO

P4.1/FSK

VDD3V

VDD3V/VDD5V

PCD6003

SERIAL

FLASH

Fig.24 Serial flash memory connection.

PCD6003 Datasheet(PDF) 57 Page - NXP Semiconductors

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