PCD6003 datasheet(10/96 Pages) PHILIPS

10 / 96 page

2001 Apr 17

Philips Semiconductors

Product speciﬁcation

Digital telephone answering machine chip

PCD6003

FUNCTIONAL DESCRIPTION

7.1

Architecture

The PCD6003 architecture is based on an embedded 8-bit

80C51 microcontroller, a Philips ‘REAL’ DSP core, two

high quality AD/DA CODECs and a 32-kbyte ROM

microcontroller memory. Refer to the block diagram in

Chapter 5.

The most important DSP peripherals are the:

• CODECs

• DSP program ROM

• DSP RAM

• IOM interface.

The most important microcontroller peripherals are the:

• Memory Control Block (MCB)

• Watchdog Timer

• General purpose ports

• I2C-bus interface

• MSK block (used for digital data transfer and analogue

cordless applications).

The MCB, through Ports P0, P2, P4 and Memory

Address (MA) can interface to various types of flash

memory including serial, parallel or multiplexed

command/address/data. Most of the peripherals are

controlled via microcontroller special function registers.

The microcontroller initializes and controls the:

• DSP via the DSP to Microcontroller Interface (DMI)

• Speech flash memory via the Memory Control

Block (MCB), and P0/P4 port pins

• Clock and power settings via the Timing and Control

Block (TICB)

• Analog section via its Special Function Registers (SFR).

7.2

I/O summary

All digital I/O for peripherals such as keyboard, display,

line interface and others are handled by the

microcontroller via ports P0, P1, P2, P3, P4, and MA.

Port 2 and MA provide 16 general purpose output-only

lines (not bit-addressable, push-pull, 4 mA) to drive

peripherals. These ports can be used for peripheral control

if EA is logic 1. The 4 mA driving level should be adequate

to drive a low power LED directly if required.

In addition to these 16 output-only lines, 16 general

purpose I/O lines are provided by Ports 1 and 3. Port 1

can handle 5 external interrupts (P1.0 to P1.4) that are

also HIGH/LOW interrupt level programmable. Port 1 also

contains the I2C-bus. Port 3 can handle an additional

2 external interrupts (P3.2 and P3.3) which are active

LOW only. The Timer 0 and Timer 1 inputs are available

on Port 3 as for the standard 80C51. Ports 1 and 3 are

80C51 weak pull-up I/O lines with a 4 mA sink capability,

with the exception of the I2C-bus lines P1.6 and P1.7

which are open-drain. If the P3 alternate port function for

the MSK modem is chosen then the standard I/O is not

available on pins P3.0, P3.1, P3.6 and P3.7.

Port 4 lines are 6 more general purpose I/O. They will be

configured as open-drain after reset. These open-drains

can be connected via pull-up resistors to the telephone

system supply or to the mains AC supply. If a flash

memory with a different supply voltage (VDD_FLASH up

to 3.3 V) is connected, P4.3 can be pulled-up to this

voltage. This is required such that the Chip Enable

Not (CEN) input of a flash device is equal to VDD_FLASH to

reduce the standby power consumption. All other Port 4

pins should not be pulled up to a voltage higher than

VDD_DTAM.

In case a CAD flash is used, P4.4 and P4.5 are free

bit-addressable ports.

All P4 pins also can be configured to push-pull via the

which 16 are output only).

In case an I2C-bus LCD driver is used, P4.0, at which

a Latch Enable (LE) function is provided for 68xxx family

microcontroller peripherals, is an additional free

bit-addressable open-drain I/O port.

The analog interfacing for the PCD6003 consists of the

analog audio I/O of the 2 CODECs and 2 additional

general purpose analog-to-digital inputs and a general

purpose digital-to-analog output for voltage measurement

and control respectively. Furthermore a stabilized

microphone supply output VMIC is provided which can be

switched on/off for power control.

One audio CODEC is dedicated for the PSTN line

communication (CODEC1). This line CODEC has a

differential low ohmic analog output which consists of

LIFPOUT and LIFMOUT. In case only one of the

differential outputs is used, LIFPOUT should be chosen,

since the Emergency mode DTMF signal is also available.

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