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PCD6003 Datasheet(PDF) 14 Page - NXP Semiconductors |
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PCD6003 Datasheet(HTML) 14 Page - NXP Semiconductors |
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14 / 96 page ![]() 2001 Apr 17 14 Philips Semiconductors Product specification Digital telephone answering machine chip PCD6003 Table 2 Descriptions and frequency values for signals shown in Fig.4 Notes 1. These values are only valid if the RTC mode bit CKCON.6 has been set according to the PLL_IN frequency used (see also Table 6). 2. If the IOM Slave mode is activated, these clock signals are synchronized to the externally applied FSC. 3. Proper IOM functionality is only guaranteed at DSP clock frequencies of 28 and 42 MHz. If the IOM Slave mode is activated, the externally applied DCK and FSC signals are used. 4. These master frequencies do not comply to IOM specification. For 3.58 MHz crystal operation, proper IOM functionality is therefore only guaranteed in Master mode. SIGNAL FUNCTION VALUE (MHz) PLL_IN 3.456 PLL_IN 3.580 Microprocessor and DSP clock signals EMG_CLK emergency clock 3.456 3.580 CLK_42 DSP selectable clock frequency 41.472 42.960 CLK_28 DSP selectable clock frequency 27.648 28.640 CLK_21 microcontroller selectable clock frequency 20.736 21.480 CLK_14 microcontroller selectable clock frequency 13.824 14.320 CLK_7 DSP and microcontroller selectable clock frequency 6.912 7.160 CLK_1 DSP and microcontroller selectable clock frequency 1.152 1.193 CODEC clock signals CLK_21 input clock for phase corrected CLK3_OUT 20.736 21.480 CLK3_EMG EMG_CLK input to CLK_3 multiplexer 3.456 3.580 CLK3_CORR frequency corrected CODEC clock (24/25 × 3.58 MHz) − 3.437(1)(2) CLK3_OUT phase corrected 3.456 MHz CODEC clock 3.456(1)(2) − CLK14_CODEC input clock for CODECs 13.824 14.320 IOM clock/timing signals DCKmaster the IOM master clock signal DCK generated by the TICB 1.536(1)(3) 1.527(1)(3)(4) FSCmaster the IOM master frame sync FSC generated by the TICB 8 kHz(1)(3) 7.955 kHz(1)(3)(4) |
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