HD64F2145 datasheet(287/829 Pages) RENESAS

287 / 829 page

Rev. 2.0, 08/02, page 247 of 788

Bit

Bit Name

Initial Value

R/W

Description

OCIBE

R/W

Output Compare Interrupt B Enable

Selects whether to enable output compare interrupt B

request (OCIB) when output compare flag B (OCFB) in

TCSR is set to 1.

0: OCIB requested by OCFB is disabled

1: OCIB requested by OCFB is enabled

OVIE

R/W

Timer Overflow Interrupt Enable

Selects whether to enable a free-running timer overflow

request interrupt (FOVI) when the timer overflow flag

(OVF) in TCSR is set to 1.

0: FOVI requested by OVF is disabled

1: FOVI requested by OVF is enabled

0—

Reserved

This bit is always read as 1 and cannot be modified.

11.3.7

Timer Control/Status Register (TCSR)

TCSR is used for counter clear selection and control of interrupt request signals.

Bit

Bit Name

Initial Value

R/W

Description

ICFA

R/(W)* Input Capture Flag A

This status flag indicates that the FRC value has been

transferred to ICRA by means of an input capture

signal. When BUFEA = 1, ICFA indicates that the old

ICRA value has been moved into ICRC and the new

FRC value has been transferred to ICRA. Only 0 can be

written to this bit to clear the flag.

[Setting condition]

When an input capture signal causes the FRC value to

be transferred to ICRA

[Clearing condition]

Read ICFA when ICFA = 1, then write 0 to ICFA

HD64F2145 Datasheet(PDF) 287 Page - Renesas Technology Corp

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