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MCP48CMB02 Datasheet(PDF) 77 Page - Microchip Technology |
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MCP48CMB02 Datasheet(HTML) 77 Page - Microchip Technology |
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77 / 106 page ![]() 2019 Microchip Technology Inc. DS20006160A-page 77 MCP48CXBXX 8.2 Application Examples The MCP48CXBXX devices are rail-to-rail output DACs designed to operate with a VDD range of 2.7V to 5.5V. The internal output amplifier is robust enough to drive common, small-signal loads directly, thus eliminating the cost and size of the external buffers for most applications. The user can select the gain of 1 or 2 of the output op amp by setting the Configuration register bits. The internal VDD or an external reference can be used. Various user options and easy-to-use features that make the devices suitable for various modern DAC applications. Application examples include: • Decreasing Output Step Size • Building a “Window” DAC • Bipolar Operation • Selectable Gain and Offset Bipolar Voltage Output • Designing a Double-Precision DAC • Building Programmable Current Source • Serial Interface Communication Times • Development Support • Power Supply Considerations • Layout Considerations 8.2.1 DC SET POINT OR CALIBRATION A common application for the devices is a digitally-controlled set point and/or calibration of variable parameters, such as sensor offset or slope. For example, the MCP48CVB2X provides 4096 output steps. If voltage reference is 4.096V (where GX = ‘0’), the LSb size is 1 mV. If a smaller output step size is desired, a lower external voltage reference is needed. 8.2.1.1 Decreasing Output Step Size If the application calibrates the bias voltage of a diode or transistor, a bias voltage range of 0.8V may be desired with about 200 µV resolution per step. Two common methods to achieve small step size are to use a lower VREF pin voltage or a voltage divider on the DAC’s output. Using an external voltage reference (VREF) is an option if the external reference is available with the desired output voltage range. However, when using a low-voltage reference voltage, occasionally the noise floor causes an SNR error that is intolerable. Using a voltage divider method is another option, and provides some advantages when the external voltage reference needs to be very low, or when the desired output voltage is not available. In this case, a larger value reference voltage is used, while two resistors scale the output range down to the precise desired level. Figure 8-2 illustrates this concept. A bypass capacitor on the output of the voltage divider plays a critical function in attenuating the output noise of the DAC and the induced noise from the environment. FIGURE 8-2: Example Circuit Of Set Point or Threshold Calibration. EQUATION 8-1: VOUT AND VTRIP CALCULATIONS R1 VCC+ VCC– VOUT SPI 2-wire VREF Optional MCP48CVBXX VDD VO R2 C1 RSENSE Comp. VDD VTRIP Vtrip VOUT R2 R1 R2 + -------------------- = VOUT = VREF • G • DAC Register Value 2N |
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