28HS01GTAM03 datasheet(35/138 Pages) INFINEON

35 / 138 page

Datasheet

35 of 138

002-18216 Rev. *W

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

Octal interface, 1.8V/3.0V

Features

4.2.1

Configuration 1: Maximum endurance - single high endurance region

Maximum endurance is achieved when all 256KB sectors are designated as high endurance. All sectors must be

designated as high endurance using the Infineon® Endurance Flex pointer architecture. Maximum endurance

pointer configuration is shown in Table 12.

4.2.2

Configuration 2: Two region selection - one long retention region and

one high endurance region

Sectors for long retention or high endurance must be delineated using the Infineon® Endurance Flex pointer

architecture. Region 0 is defined as long retention and consists of 16 sectors. Region 1 is defined as high

endurance and has 240 sectors. The pointer setup for two region configuration is shown in Table 13. The number

of pointers defined is based on the number of regions configured.

4.2.3

Endurance Flex related registers and transaction

Table 12

Endurance Flex pointer values for maximum endurance configuration[15]

Pointer #

Pointer address

EPTADn[8:0]

Region type

ERGNTn

Pointer enable#

EPTEBn

Global region selec-

tion

GBLSEL

Wear leveling enable

WRLVEN

N/A

1’b1

9'b111111111

1’b1

N/A

9'b111111111

Note

15. This is also the default configuration of the device.

Table 13

Endurance Flex pointer values for two region configuration

Pointer #

Pointer address

EPTADn[8:0]

Region type

ERGNTn

Pointer enable#

EPTEBn

Global region selec-

tion

GBLSEL

Wear leveling enable

WRLVEN

N/A

1’b0

1’b1

9’b000010000

1’b1

1'b0

N/A

9’b111111111

1’b1

1'b1

Table 14

Endurance Flex related registers and transactions

Related registers

Related SPI transactions

(see Table 75 on page 95)

Related octal transactions

(see Table 78 on page 99)

Infineon® Endurance Flex architecture Selection

Registers

(EFX4O,EFX3O,EFX2O,EFX1O,EFX0O)

(see Infineon® Endurance Flex architecture

selection register (EFXx) on page 92)

Read Any Register (RDARG_C_0)

Read Any Register (RDARG_4_0)

Write Any Register (WRARG_C_1)

Write Any Register (WRARG_4_1)

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