AD9161BBCZ datasheet(77/144 Pages) AD

77 / 144 page

Data Sheet

AD9161/AD9162

Rev. D | Page 77 of 77

ANALOG INTERFACE CONSIDERATIONS

ANALOG MODES OF OPERATION

The AD9161/AD9162 use the quad-switch architecture shown in

Figure 180. Only one pair of switches is enabled during a half-clock

cycle, thus requiring each pair to be clocked on alternative clock

edges. A key benefit of the quad-switch architecture is that it masks

the code dependent glitches that occur in the conventional two-

switch DAC architecture.

VG1

VSSA

IOUTP

IOUTN

VG1VG2VG3VG4

CLK±

CLK

LATCHES

DATA INPUT

VG2

VG3

VG4

Figure 180. Quad-Switch Architecture

In two-switch architecture, when a switch transition occurs and

D1 and D2 are in different states, a glitch occurs. However, if D1

and D2 happen to be at the same state, the switch transitions and

no glitches occur. This code dependent glitching causes an

increased amount of distortion in the DAC. In quad-switch

architecture (no matter what the codes are), there are always

two switches that are transitioning at each half-clock cycle, thus

eliminating the code-dependent glitches but, in the process,

creating a constant glitch at 2 × fDAC. For this reason, a significant

clock spur at 2 × fDAC is evident in the DAC output spectrum.

INPUT

DATA

DACCLK_x

TWO-SWITCH

DAC OUTPUT

FOUR-SWITCH

DAC OUTPUT

(NORMAL MODE)

D1 D2 D3 D4 D5

D6 D7 D8 D9 D10

D1 D2 D3

D6 D7 D8 D9 D10

D1 D2 D3 D4 D5

Figure 181. Two-Switch and Quad-Switch DAC Waveforms

As a consequence of the quad-switch architecture enabling

updates on each half-clock cycle, it is possible to operate that

DAC core at 2× the DAC clock rate if new data samples are latched

into the DAC core on both the rising and falling edge of the

DAC clock. This notion serves as the basis when operating the

AD9161/AD9162 in either Mix-Mode or return to zero (RZ)

mode. In each case, the DAC core is presented with new data

samples on each clock edge: in RZ mode, the rising edge clocks

data and the falling edge clocks zero, while in Mix-Mode; the

falling edge sample is simply the complement of the rising edge

sample value.

When Mix-Mode is used, the output is effectively chopped at

the DAC sample rate. This chopping has the effect of reducing

the power of the fundamental signal while increasing the power

of the images centered around the DAC sample rate, thus

improving the dynamic range of these images.

INPUT

DATA

DACCLK_x

FOUR-SWITCH

DAC OUTPUT

(

fS MIX-MODE)

–D6

–D7

–D8

–D9

–D10

D10

–D1

–D2

–D3

–D4

–D5

D6 D7 D8 D9 D10

D1 D2

D3 D4 D5

Figure 182. Mix-Mode Waveform

This ability to change modes provides the user the flexibility to

place a carrier anywhere in the first three Nyquist zones, depending

on the operating mode selected. Switching between baseband

and Mix-Mode reshapes the sinc roll-off inherent at the DAC

output. In baseband mode, the sinc null appears at fDACCLK because

the same sample latched on the rising clock edge is also latched

again on the falling clock edge, thus resulting in the same ubiqui-

tous sinc response of a traditional DAC. In Mix-Mode, the

complement sample of the rising edge is latched on the falling

edge, therefore pushing the sinc null to 2 × fDACCLK. Figure 183

shows the ideal frequency response of the three modes with the

sinc roll-off included.

FREQUENCY (Hz)

0FS

1.50FS

1.25FS

1.00FS

0.75FS

0.50FS

0.25FS

–35

–30

–25

–20

–15

–10

–5

FIRST

NYQUIST ZONE

SECOND

NYQUIST ZONE

THIRD

NYQUIST ZONE

MIX-MODE

RZ MODE

NORMAL

MODE

Figure 183. Sinc Roll-Off for NRZ, RZ, and Mix-Mode Operation

The quad-switch can be configured via SPI (Register 0x152,

Bits[1:0]) to operate in either NRZ mode (0b00), RZ mode

(0b10), or Mix-Mode (0b01). The AD9161/AD9162 have an

additional frequency response characteristic due to the FIR85

filter. This filter samples data on both the rising and falling

edges of the DAC clock, in essence doubling the input clock

frequency. As a result, the NRZ (normal) mode roll-off in

Figure 183 is extended to 2 × fDAC in Figure 183, and follows the

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