MCT8317A datasheet(113/161 Pages) TI1

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Table 8-30. FAULT_CONFIG1 Register Field Descriptions (continued)

Bit

Field

Type

Reset

Description

14-11

LOCK_ILIMIT_DEG

R/W

Lock detection current limit deglitch time

0h = 1 ms

1h = 2 ms

2h = 5 ms

3h = 10 ms

4h = 25 ms

5h = 50 ms

6h = 75 ms

7h = 100 ms

8h = 250 ms

9h = 500 ms

Ah = 1 s

Bh = 2.5 s

Ch = 5 s

Dh = 10 s

Eh = 25 s

Fh = 50 s

10-8

CBC_RETRY_PWM_CYC R/W

Number of PWM cycles for CBC current limit to retry

0h = 0

1h = 1

2h = 2

3h = 3

4h = 4

5h = 5

6h = 6

7h = 7

RESERVED

R/W

Reserved

6-3

MTR_LCK_MODE

R/W

Motor lock mode

0h = Motor lock detection causes latched fault; nFAULT active; Gate

driver is tristated

1h = Motor lock detection causes latched fault; nFAULT active; Gate

driver is in recirculation mode

2h = Motor lock detection causes latched fault; nFAULT active; Gate

driver is in high-side brake mode (All high-side FETs are turned ON)

3h = Motor lock detection causes latched fault; nFAULT active; Gate

driver is in low-side brake mode (All low-side FETs are turned ON)

4h = Automatic recovery after tLCK_RETRY; Gate driver is tristated

5h = Automatic recovery after tLCK_RETRY; Gate driver is in

recirculation mode

6h = Automatic recovery after tLCK_RETRY; Gate driver is in high-

side brake mode (All high-side FETs are turned ON)

7h = Automatic recovery after tLCK_RETRY; Gate driver is in low-

side brake mode (All low-side FETs are turned ON)

8h = Motor lock detection is in report only but no action is taken

9h = Motor lock detection is disabled

Bh = Motor lock detection is disabled

Ch = Motor lock detection is disabled

Dh = Motor lock detection is disabled

Eh = Motor lock detection is disabled

Fh = Motor lock detection is disabled

2-0

LCK_RETRY

R/W

Lock retry time

0h = 100 ms

1h = 500 ms

2h = 1000 ms

3h = 2000 ms

4h = 3000 ms

5h = 5000 ms

6h = 7500 ms

7h = 10000 ms

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MCT8317A

SLLSFQ2 – JANUARY 2023

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